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| CY7C1380S Datasheet, PDF (20/31 Pages) Cypress Semiconductor – 18-Mbit (512 K × 36/1 M × 18) Pipelined SRAM | |||
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CY7C1380S
CY7C1382S
Capacitance
Parameter [17]
Description
CIN
CCLK
CIO
Input capacitance
Clock input capacitance
Input/Output capacitance
Thermal Resistance
Parameter [17]
Description
ïJA
Thermal resistance
(junction to ambient)
ïJC
Thermal resistance
(junction to case)
Test Conditions
TA = 25 °C, f = 1 MHz,
VDD = 3.3 V, VDDQ = 2.5 V
100-pin TQFP 165-ball FBGA
Package
Package
Unit
5
9
pF
5
9
pF
5
9
pF
Test Conditions
100-pin TQFP 165-ball FBGA
Package
Package
Unit
Test conditions follow standard test
methods and procedures for measuring
thermal impedance, in accordance with
EIA/JESD51.
28.66
4.08
20.7
°C/W
4.0
°C/W
AC Test Loads and Waveforms
Figure 4. AC Test Loads and Waveforms
3.3 V I/O Test Load
OUTPUT
Z0 = 50 ï
3.3 V
OUTPUT
RL = 50 ï
5 pF
VT = 1.5 V
(a)
INCLUDING
JIG AND
SCOPE
2.5 V I/O Test Load
OUTPUT
2.5 V
Z0 = 50 ï
OUTPUT
RL = 50 ï
5 pF
VT = 1.25 V
(a)
INCLUDING
JIG AND
SCOPE
R = 317 ï
R = 351 ï
VDDQ
GND
ALL INPUT PULSES
10%
90%
ï£ 1 ns
90%
10%
ï£ 1 ns
(b)
(c)
R = 1667 ï
VDDQ
R = 1538 ï
GND
10%
ï£ 1 ns
ALL INPUT PULSES
90%
90%
10%
ï£ 1 ns
(b)
(c)
Note
17. Tested initially and after any design or process change that may affect these parameters.
Document Number: 001-43822 Rev. *F
Page 20 of 31
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