CYDC128B16_11 Datasheet, PDF(2/29 Page) Cypress Semiconductor – 1.8 V 4 K/8 K/16 K × 16 and 8 K/16 K × 8 ConsuMoBL Dual-Port Static RAM

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CYDC128B16_11 Datasheet, PDF (2/29 Pages) Cypress Semiconductor – 1.8 V 4 K/8 K/16 K × 16 and 8 K/16 K × 8 ConsuMoBL Dual-Port Static RAM

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Top Level Block Diagram[1, 2]

I/O[15:0]L

UBL

LBL

Control

CYDC128B16

I/O[15:0]R

UBR

LBR

16K X 16

Dual Ported Array

A[13:0]L

CE L

OE L

R/W L

SEML

BUSY L

INTL

IRR0 ,IRR1

Address Decode

Mailboxes

CEL

OEL

R/WL

Interrupt

Arbitration

Semaphore

M/S

INTR

Input Read

Output Drive

SFEN

CE R

OE R

R/W R

ODR0 - ODR4

A [13:0]R

CE R

OE R

R/W R

SEMR

BUSY R

Notes

1. A0âA11 for 4k devices; A0âA12 for 8k devices; A0âA13 for 16k devices.

2. BUSY is an output in master mode and an input in slave mode.

Document #: 001-01638 Rev. *H

Page 2 of 29

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