CYDC128B16_11 Datasheet, PDF (13/29 Pages) Cypress Semiconductor – 1.8 V 4 K/8 K/16 K × 16 and 8 K/16 K × 8 ConsuMoBL Dual-Port Static RAM

CYDC128B16
]
Electrical Characteristics for 3.0 V Over the Operating Range
CYDC128B16
CYDC128B16
Parameter
Description
-40
-55
Unit
P1 I/O P2 I/O
Voltage Voltage
Min
Typ
Max
Min
Typ
Max
V_OH
V_OL
V_OL ODR
V_IH
Output HIGH voltage (I_OH = –2 mA)
Output LOW voltage (I_OL = 2 mA)
ODR output LOW voltage (I_OL = 8 mA)
Input HIGH voltage
3.0 V (any port) 2.1
3.0 V (any port)
3.0 V (any port)
3.0 V (any port) 2.0
2.1
0.4
0.2
V_DDIO 2.0
+ 0.2
V
0.4 V
0.2 V
V_DDIO V
+ 0.2
V_IL
Input LOW voltage
3.0 V (any port) –0.2
I_OZ
Output leakage current
3.0 V 3.0 V –1
I_CEX ODR ODR output leakage current. V_OUT = V_CC 3.0 V 3.0 V –1
I_IX
Input leakage current
3.0V 3.0 V –1
I_CC
Operating current (V_CC = Max, Industrial 3.0V 3.0 V
49
I_OUT = 0 mA) Outputs disabled
I_SB1
Standby current (both ports TTL Industrial 3.0 V 3.0 V
7
Level) CE_L and CE_R ≥ V_CC –
0.2, SEM_L = SEM_R = V_CC – 0.2,
f = f_MAX
I_SB2
Standby current (one port TTL Industrial 3.0 V 3.0 V
28
Level) CE_L | CE_R ≥ V_IH, f = f_MAX
I_SB3
Standby current (both ports Industrial 3.0 V 3.0 V
6
CMOS Level) CE_L and CE_R ≥
V_CC − 0.2V, SEM_L and SEM_R >
V_CC – 0.2V, f = 0
I_SB4
Standby current (one port
Industrial 3.0 V 3.0 V
28
CMOS Level)
f = f_MAX[1]
CE_L
|
CE_R
≥
V_IH,
0.7 –0.2
1
–1
1
–1
1
–1
70
42
10
7
40
25
8
6
40
25
0.7 V
1 μA
1 μA
1 μA
60 mA
10 μA
35 mA
8 μA
35 mA
1. MAX = 1/t_RC = All inputs cycling at f = 1/t_RC (except output enable). f = 0 means no address or control lines change. This applies only to inputs
at CMOS level standby I_SB3.
Capacitance
Parameter^[1]
Description
Test Conditions
C_IN
C_OUT
Input capacitance
Output capacitance
T_A = 25°C, f = 1 MHz,
V_CC = 3.0V
1. Tested initially and after any design or process changes that may affect these parameters.
Max
Unit
9
pF
10
pF
Document #: 001-01638 Rev. *H
Page 13 of 29
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