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CY8C23433_13 Datasheet, PDF (19/53 Pages) Cypress Semiconductor – PSoC® Programmable System-on-Chip™
CY8C23433, CY8C23533
Table 12. 3.3-V DC Operational Amplifier Specifications
Symbol
Description
VOSOA
Input offset voltage (absolute value)
Power = low, Opamp bias = high
Power = medium, Opamp bias = high
Power = high, Opamp bias = high
TCVOSOA
IEBOA
CINOA
Average input offset voltage drift
Input leakage current (port 0 analog pins)
Input capacitance (port 0 analog pins)
VCMOA Common mode voltage range
GOLOA
Open loop gain
Power = low, ppamp Opamp bias = low
Power = medium, Opamp bias = low
Power = high, Opamp bias = low
VOHIGHOA High output voltage swing (internal signals)
Power = low, Opamp bias = low
Power = medium, Opamp bias = low
Power = high, Opamp bias = low
VOLOWOA Low output voltage swing (internal signals)
Power = low, ppamp Opamp bias = low
Power = medium, Opamp bias = low
Power = high, Opamp bias = low
ISOA
Supply current (including associated AGND
buffer)
Power = low, Opamp bias = low
Power = low, Opamp bias = high
Power = medium, Opamp bias = low
Power = medium, Opamp bias = high
Power = high, Opamp bias = low
Power = high, Opamp bias = high
PSRROA Supply voltage rejection ratio
Min Typ Max Units
Notes
Power = high, Opamp bias = high
–
1.65 10
mV setting is not allowed for 3.3 V VDD
–
1.32
8
mV operation.
–
–
–
mV
–
7.0 35.0 µV/°C
–
20
–
pA Gross tested to 1 A
–
4.5
9.5
pF Package and pin dependent.
Temp = 25 °C
0.2
– VDD – 0.2 V The common-mode input voltage
range is measured through an
analog output buffer. The
specification includes the
limitations imposed by the
characteristics of the analog
output buffer.
60
–
60
–
80
–
Specification is applicable at low
–
dB Opamp bias. For high Opamp bias
–
dB mode (except high power, high
–
dB Opamp bias), minimum is 60 dB.
Power = high, Opamp bias = high
VDD – 0.2 –
–
V setting is not allowed for 3.3 V VDD
VDD – 0.2 –
–
V operation.
VDD – 0.2 –
–
V
Power = high, Opamp bias = high
–
–
0.2
V setting is not allowed for 3.3 V VDD
–
–
0.2
V operation.
–
–
0.2
V
Power = high, Opamp bias = high
setting is not allowed for 3.3 V VDD
–
150 200 mA operation.
–
300 400 mA
–
600 800 mA
–
1200 1600 mA
–
2400 3200 mA
–
–
–
mA
64
80
–
dB VSS £ VIN £ (VDD – 2.25) or
(VDD – 1.25 V) £ VIN £ VDD
DC Low Power Comparator Specifications
The following table lists the guaranteed maximum and minimum specifications for the voltage and temperature ranges: 4.75 V to 5.25
V and –40 °C  TA  85 °C, or 3.0 V to 3.6 V and –40 °C  TA  85 °C, respectively. Typical parameters apply to 5 V and 3.3 V at 25
°C and are for design guidance only.
Table 13. DC Low Power Comparator Specifications
Symbol
VREFLPC
ISLPC
VOSLPC
Description
Low power comparator (LPC) reference voltage range
LPC supply current
LPC voltage offset
Min
Typ
Max
Units
0.2
–
VDD – 1.0
V
–
10
40
A
–
2.5
30
mV
Document Number: 001-44369 Rev. *G
Page 19 of 53