CY8C21323_08 Datasheet, PDF (18/37 Pages) Cypress Semiconductor – PSoC® Mixed Signal Array

CY8C21123, CY8C21223, CY8C21323
DC Electrical Characteristics
DC Chip-Level Specifications
Table 14 lists the guaranteed maximum and minimum specifications for the voltage and temperature ranges: 4.75V to 5.25V and -40°C
≤ T_A ≤ 85°C, 3.0V to 3.6V and -40°C ≤ T_A ≤ 85°C, or 2.4V to 3.0V and -40°C ≤ T_A ≤ 85°C, respectively. Typical parameters apply to
5V, 3.3V, or 2.7V at 25°C and are for design guidance only.
Table 14. DC Chip-Level Specifications
Symbol
Description
Vdd
Supply Voltage
I_DD
Supply Current, IMO = 24 MHz
Min
Typ
2.40
–
–
3
I_DD3
Supply Current, IMO = 6 MHz
–
1.2
I_DD27 Supply Current, IMO = 6 MHz
–
1.1
I_SB27
Sleep (Mode) Current with POR, LVD,
Sleep Timer, WDT, and internal slow
–
2.6
oscillator active. Mid temperature range.
I_SB
Sleep (Mode) Current with POR, LVD,
Sleep Timer, WDT, and internal slow
oscillator active.
–
2.8
V_REF Reference Voltage (Bandgap)
1.28
1.30
V_REF27 Reference Voltage (Bandgap)
1.16
1.30
AGND Analog Ground
V_REF - 0.003 V_REF
Max
Units
Notes
5.25
V See DC POR and LVD specifica-
tions, Table 21 on page 22.
4
mA Conditions are Vdd = 5.0V, 25^oC,
CPU = 3 MHz, SYSCLK doubler
disabled. VC1 = 1.5 MHz
VC2 = 93.75 kHz
VC3 = 0.366 kHz.
2
mA Conditions are Vdd = 3.3V, 25^oC,
CPU = 3 MHz, clock doubler
disabled. VC1 = 375 kHz
VC2 = 23.4 kHz
VC3 = 0.091 kHz
1.5
mA Conditions are Vdd = 2.55V,
25^oC, CPU = 3 MHz, clock
doubler disabled. VC1 = 375 kHz
VC2 = 23.4 kHz
VC3 = 0.091 kHz
4
μA Vdd = 2.55V, 0^oC to 40^oC
5
μA Vdd = 3.3V, -40^oC ≤ T_A ≤ 85^oC
1.32
1.330
V_REF+ 0.003
V Trimmed for appropriate Vdd.
Vdd = 3.0V to 5.25V
V Trimmed for appropriate Vdd.
Vdd = 2.4V to 3.0V
V
Document Number: 38-12022 Rev. *H
Page 18 of 37
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