CY28326 Datasheet, PDF (16/23 Pages) Cypress Semiconductor – FTG for VIA PT880 Serial Chipset

Situation 1 : Power on & Ratio initial by HW strapping
VCC3
M ODE
POR(Power On
Re se t)
VTT_PWRGD
20us
280us
Ratio Select PIN
When Power up Ratio Select PIN = "Lo" then
Lo
PIN19,PIN20 become Ratio Function PIN
(PIN20)Ratio1/
PCI6
(PIN19)Ratio0/
PCI5
Syste mPowe r
OK
Power up PIN20 default = Ratio 1 follow HW FSB
Strapping
Lo
Power up PIN19 default = Ratio 0 follow HW FSA
Strapping
Hi
1ms
PCI RESET
Figure 12. Situation 1: Power on & Ratio initial by HW strapping
CY28326
P o w e r s e q u e n c e fo r R a t io P IN
S it u a t io n 2 : B IO S p r o g r a m m in g S W F S E L t a b le a n d S y s t e m r e s e t
b y W a t c h d o g t im e r r e s e t fu n c t io n ( N O F r e q u e c n y r e c o v e r y ) .
VCC3
Hi
M ODE
Hi
PO R (Po w e r O n
R e s e t)
Hi
VTT_PW RG D
Hi
R a tio S e le c t P IN
( P IN 2 0 ) R a t io 1 /
P C I6
( P IN 1 9 ) R a t io 0 /
P C I5
Syste m Po w e r
OK
Lo
A f t e r B IO S p r o g r a m m in g S W F S E L R a t io 1 s w it c h t o n e w S W
F S 1 v a lu e
Hi
A f t e r B IO S p r o g r a m m in g S W F S E L R a t io 0 s w itc h t o n e w S W
F S 0 v a lu e
Hi
1ms
PCI RESET
S y s te m S tr a p p in g F re q R a tio in th is
p o in t
Figure 13. BIOS programming SW FSEL table and System reset by
Watch timer reset function (NO Frequency recovery).
Document #: 38-07616 Rev. *A
Page 16 of 23