CY14B512P_12 Datasheet, PDF (12/34 Pages) Cypress Semiconductor – 512-Kbit (64 K × 8) Serial (SPI) nvSRAM with Real Time Clock

CY14B512P
CS
SCK
SI
SO
Figure 11. Burst Mode Read Instruction Timing
01 2 3 456 7 01 2 3 45 6 7
12 13 14 15 0 1 2 3 4 5 6 7 0 7 0 1 2 3 4 5 6 7
Op-Code
16-bit Address
0 0 0 0 0 0 1 1 15 14 13 12 11 10 9 8
MSB
321 0
LSB
Data Byte 1
Data Byte N
HI-Z
D7 D6 D5 D4 D3 D2 D1 D0 D7 D0 D7 D6 D5 D4 D3 D2 D1 D0
MSB
LSB
MSB
LSB
CS
SCK
SI
SO
Figure 12. Write Instruction Timing
0 1 2 34 5 67 0 1 23 4 56 7
12 13 14 15 0 1 2 3 4 5 6 7
Op-Code
16-bit Address
0 0 0 0 0 0 1 0 15 14 13 12 11 10 9 8
MSB
3 2 1 0 D7 D6 D5 D4 D3 D2 D1 D0
LSB MSB
Data
LSB
HI-Z
Figure 13. Burst Mode Write Instruction Timing
CS
SCK
SI
0 1 2 3 4 5 6 7 0 1 2 3 4 5 6 7 12 13 14 15 0 1 2 3 4 5 6 7 0 7 0 1 2 3 4 5 6 7
Data Byte 1
Data Byte N
Op-Code
16-bit Address
0 0 0 0 0 0 1 0 15 14 13 12 11 10 9 8
MSB
3 2 1 0 D7 D6 D5 D4 D3 D2 D1 D0 D7 D0 D7 D6 D5 D4 D3 D2 D1 D0
LSB MSB
LSB
SO
HI-Z
RTC Access
CY14B512P uses 16 registers for RTC. These registers can be
read out or written to by accessing all 16 registers in burst mode
or accessing each register, one at a time. The RDRTC and
WRTC instructions are used to access the RTC.
All the RTC registers can be read in burst mode by issuing the
RDRTC instruction and reading all 16 bytes without bringing the
CS pin HIGH. The ‘R’ bit must be set while reading the RTC
timekeeping registers to ensure that transitional values of time
are not read.
Writes to the RTC register are performed using the WRTC
instruction. Writing RTC timekeeping registers and control
registers, except for the flags register needs the ‘W’ bit of the
flags register to be set to ‘1’. The internal counters are updated
with the new date and time setting when the ‘W’ bit is cleared to
‘0’. All the RTC registers can also be written in burst mode using
the WRTC instruction.
Document Number: 001-53872 Rev. *H
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