BCM20713A1KUBXGT Datasheet, PDF (12/65 Pages) Cypress Semiconductor – Single-Chip Bluetooth Transceiver and Baseband Processor

BCM20713 Preliminary Data Sheet
Block Diagram
Block Diagram
Figure 2 on page 11 shows the interconnect of the major BCM20713 physical blocks and associated external
interfaces.
Figure 2: Functional Block Diagram
ARM7TDMI-S
DMA
Trap &
Patch
32-bit AHB
BI
Address Decoder
Bus Arb
AHB2APB
WD Timer
GPIO+Aux
Remap
& Pause
SW
Timers
OTP
128 bytes) _{32-bit APB}
Bluetooth Radio
Blue RF Registers
AHB2MEM
ROM
384 KB
AHB2MEM
RAM
112 KB
Digital
Modulator
Calibration &
Control
Digital Demod
Bit Sync
Low Power
Scan
U
LPO
POR
PMU Control
Interrupt
Controller
JTAG
Master
LCU
Buffer
APU
Blue RF I/F
BT Clk/
Hopper
Rx/Tx
Buffer
COEX
SECI
Scan JTAG
SPIM
USB
PCM
UART
Debug
UART
SPI/EMPSPI
(Spiffy)
I2C_Master
FIFO 1
FIFO 2
PTU
Usage Model
The BCM20713 is designed to provide a direct interface to industrial systems, as shown in Figure 3. The device
has flexible PCM and UART interfaces, enabling it to transparently connect to existing circuits.
The device incorporates a number of unique features to accommodate integration into industrial systems.
• The PCM interface provides multiple modes of operation to support both master and slave, as well as
hybrid interfacing to one or more external codec devices.
• The UART interface supports hardware flow control with tight integration to power control sideband
signaling to support the lowest power operation.
• Few external components are required for integration.
Broadcom^®
December 21, 2015 • 20713-DS102-R
Single-Chip Bluetooth Transceiver and Baseband Processor
Page 11
BROADCOM CONFIDENTIAL