CY14B101KA_11 Datasheet, PDF (11/34 Pages) Cypress Semiconductor – 1 Mbit (128K x 8/64K x 16) nvSRAM with Real Time Clock

CY14B101KA
CY14B101MA
Flags Register
The flags register has three flag bits: WDF, AF, and PF, which can be used to generate an interrupt. These flags are set by the watchdog
timeout, alarm match, or power fail monitor respectively. The processor can either poll this register or enable interrupts to be informed
when a flag is set. These flags are automatically reset when the register is read. The flags register is automatically loaded with the
value 0x00 on power-up (except for the OSCF bit; see Stopping and Starting the Oscillator on page 9).
Figure 4. RTC Recommended Component Configuration
Recommended Values
Y₁ = 32.768 kHz (12.5 pF)
C₁ = 10 pF
C₂ = 67 pF
Note: The recommended values for C1 and C2 include
board trace capacitance.
C1
Y1
C2
Xout
Xin
Figure 5. Interrupt Block Diagram
Watchdog
Timer
Power
Monitor
VINT
Clock
Alarm
WDF
WIE
PF
PFE
AF
AIE
P/L
V_CC
Pin
Driver
INT
H/L
VSS
WDF - Watchdog Timer Flag
WIE - Watchdog Interrupt
Enable
PF - Power Fail Flag
PFE - Power Fail Enable
AF - Alarm Flag
AIE - Alarm Interrupt Enable
P/L - Pulse Level
H/L - High/Low
Document #: 001-42880 Rev. *I
Page 11 of 34
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