W311 Datasheet, PDF (10/19 Pages) Silicon Laboratories – FTG for VIA™ Pro-266 DDR Chipset

W311
Byte 11: Recovery Frequency N-Value Register
Bit
Name
Default
Pin Description
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
ROCV_FREQ_N7
ROCV_FREQ_N6
ROCV_FREQ_N5
ROCV_FREQ_N4
ROCV_FREQ_N3
ROCV_FREQ_N2
ROCV_FREQ_N1
ROCV_FREQ_N0
0
If ROCV_FREQ_SEL is set, W311 will use the values programmed in
0
ROCV_FREQ_N[7:0] and ROCV_FREQ_M[6:0] to determine the recovery
CPU output frequency.when a Watchdog Timer time-out occurs
0
The setting of FS_Override bit determines the frequency ratio for CPU,
0
SDRAM, AGP and SDRAM. When it is cleared, W311 will use the same fre-
quency ratio stated in the Latched FS[4:0] register. When it is set, W311will
0
use the frequency ratio stated in the SEL[4:0] register.
0
W312 supports programmable CPU frequency ranging from 50MHz to
248MHz.
0
W311 will change the output frequency whenever there is an update to either
0
ROCV_FREQ_N[7:0] and ROCV_FREQ_M[6:0]. Therefore, it is recommend-
ed to use Word or Block write to update both registers within the same SMBus
bus operation.
Byte 12: Recovery Frequency M-Value Register
Bit
Name
Default
Pin Description
Bit 7
ROCV_FREQ_SEL
0
ROCV_FREQ_SEL determines the source of the recover frequency when a
Watchdog Timer time-out occurs. The clock generator will automatically
switch to the recovery CPU frequency based on the selection on
ROCV_FREQ_SEL.
0 = From latched FS[4:0]
1 = From the settings of ROCV_FREQ_N[7:0] & ROCV_FREQ_M[6:0]
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
ROCV_FREQ_M6
ROCV_FREQ_M5
ROCV_FREQ_M4
ROCV_FREQ_M3
ROCV_FREQ_M2
ROCV_FREQ_M1
ROCV_FREQ_M0
0
If ROCV_FREQ_SEL is set, W311 will use the values programmed in
0
ROCV_FREQ_N[7:0] and ROCV_FREQ_M[6:0] to determine the recovery
CPU output frequency.when a Watchdog Timer time-out occurs.The setting
0
of FS_Override bit determines the frequency ratio for CPU, SDRAM, AGP and
0
SDRAM. When it is cleared, W311 will use the same frequency ratio stated
in the Latched FS[4:0] register. When it is set, W311 will use the frequency
0
ratio stated in the SEL[4:0] register.
0
W311 supports programmable CPU frequency ranging from 50 MHz to
248 MHz.
0
W311 will change the output frequency whenever there is an update to either
ROCV_FREQ_N[7:0] and ROCV_FREQ_M[6:0]. Therefore, it is recommend-
ed to use Word or Block write to update both registers within the same SMBus
bus operation.
Byte 13: Programmable Frequency Select N-Value Register
Bit
Name
Default
Pin Description
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
CPU_FSEL_N7
CPU_FSEL_N6
CPU_FSEL_N5
CPU_FSEL_N4
CPU_FSEL_N3
CPU_FSEL_N2
CPU_FSEL_N1
0
If Prog_Freq_EN is set, W311 will use the values programmed in
0
CPU_FSEL_N[7:0] and CPU_FSEL_M[6:0] to determine the CPU output fre-
quency. The new frequency will start to load whenever CPU_FSELM[6:0] is
0
updated.
0
The setting of FS_Override bit determines the frequency ratio for CPU,
SDRAM, AGP and SDRAM. When it is cleared, W311 will use the same
0
frequency ratio stated in the Latched FS[4:0] register. When it is set, W311
0
will use the frequency ratio stated in the SEL[4:0] register.
W311 supports programmable CPU frequency ranging from 50 MHz to
0
248 MHz.
Bit 0
CPU_FSEL_N0
0
10