W181-01GT Datasheet, PDF (1/9 Pages) Cypress Semiconductor – Peak-Reducing EMI Solution

W181
Peak-Reducing EMI Solution
Features
• Cypress PREMIS™ family offering
• Generates an EMI optimized clocking signal
at the output
• Selectable input to output frequency
• Single 1.25% or 3.75% down or center spread output
Simplified Block Diagram
3.3 or 5.0V
XTAL
Input
40 MHz
Max.
X1
X2
W181
Spread Spectrum
Output
(EMI suppressed)
3.3 or 5.0V
Oscillator or
Reference Input
W181
Spread Spectrum
Output
(EMI suppressed)
• Integrated loop filter components
• Operates with a 3.3V or 5V supply
• Low-power CMOS design
• Available in 8-pin small outline integrated circuit
(SOIC) or 14-pin thin shrink small outline package
(TSSOP select options only)
Pin Configurations
SOIC
CLKIN or X1 1
NC or X2 2
GND 3
SS% 4
8 FS2
7 FS1
6 VDD
5 CLKOUT
CLKIN or X1 1
NC or X2 2
GND 3
SS% 4
8 SSON#
7 FS1
6 VDD
5 CLKOUT
TSSOP
FS2 1
CLKIN or X1 ₂
NC or X2 ³
GND 4
NC 5
SS% 6
NC 7
14 NC
13 ^NC
12 FS1
11 ^NC
10 VDD
9 NC
8 CLKOUT
Cypress Semiconductor Corporation • 3901 North First Street • San Jose, CA 95134 • 408-943-2600
Document #: 38-07152 Rev. *D
Revised July 06, 2004