CY7C63722C Datasheet, PDF (1/53 Pages) Cypress Semiconductor – enCoRe™ USB Combination Low-Speed USB and PS/2 Peripheral Controller

CY7C63722C
CY7C63723C
CY7C63743C
enCoRe™ USB Combination Low-Speed
USB and PS/2 Peripheral Controller
Features
■ SPI serial communication block
❐ Master or slave operation
■ enCoRe™ USB - enhanced Component Reduction
❐ Internal oscillator eliminates the need for an external crystal
or resonator
❐ Interface can auto-configure to operate as PS/2 or USB with-
out the need for external components to switch between
modes (no General Purpose I/O [GPIO] pins needed to man-
age dual mode capability)
❐ Internal 3.3V regulator for USB pull-up resistor
❐ Configurable GPIO for real-world interface without external
components
■ Flexible, cost-effective solution for applications that combine
❐ 2 Mbit/s transfers
■ Four 8-bit Input Capture registers
s _{❐ Two registers each for two input pins}
n ^{❐ Capture timer setting with five prescaler settings}
❐ Separate registers for rising and falling edge capture
ig ^{❐ Simplifies interface to RF inputs for wireless applications}
s ■ Internal low-power wake-up timer during suspend mode
❐ Periodic wake-up with no external components
De ^{■ Optional 6-MHz internal oscillator mode}
PS/2 and low-speed USB, such as mice, gamepads, joysticks,
and many others.
w _{■ USB Specification Compliance}
e ❐ Conforms to USB Specification, Version 2.0
❐ Conforms to USB HID Specification, Version 1.1
N ❐ Supports one low-speed USB device address and three data
endpoints
r _{❐ Integrated USB transceiver}
fo ^{❐ 3.3V regulated output for USB pull-up resistor}
■ 8-bit RISC microcontroller
d ❐ Harvard architecture
❐ 6-MHz external ceramic resonator or internal clock mode
e _{❐ 12-MHz internal CPU clock}
d _{❐ Internal memory}
n ^{❐ 256 bytes of RAM}
❐ 8 Kbytes of EPROM
e _{❐ Interface can auto-configure to operate as PS/2 or USB}
❐ No external components for switching between PS/2 and
m _{USB modes}
❐ No GPIO pins needed to manage dual mode capability
m _{■ I/O ports}
o _{❐ Up to 16 versatile GPIO pins, individually configurable}
c _{❐ High current drive on any GPIO pin: 50 mA/pin current sink}
e ^{❐ Each GPIO pin supports high-impedance inputs, internal}
pull-ups, open drain outputs or traditional CMOS outputs
Not ^{R ❐ Maskable interrupts on all I/O pins}
❐ Allows fast start-up from suspend mode
■ Watchdog Reset (WDR)
■ Low-voltage Reset at 3.75V
■ Internal brown-out reset for suspend mode
■ Improved output drivers to reduce EMI
■ Operating voltage from 4.0V to 5.5VDC
■ Operating temperature from 0°C to 70°C
■ CY7C63723C available in 18-pin SOIC, 18-pin PDIP
■ CY7C63743C available in 24-pin SOIC, 24-pin PDIP, 24-pin
QSOP
■ CY7C63722C available in DIE form
■ Industry standard programmer support
Cypress Semiconductor Corporation • 198 Champion Court
Document #: 38-08022 Rev. *D
• San Jose, CA 95134-1709 • 408-943-2600
Revised October 20, 2010
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