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CY7C63310 Datasheet, PDF (1/83 Pages) Cypress Semiconductor – enCoRe™ II Low-Speed USB Peripheral Controller | |||
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CY7C63310, CY7C638xx
enCoRe⢠II
Low-Speed USB Peripheral Controller
1. Features
â USB 2.0-USB-IF certified (TID # 40000085)
â enCoReTM II USB - âenhanced Component Reductionâ
â Crystalless oscillator with support for an external clock. The
internal oscillator eliminates the need for an external crystal
or resonator.
â Two internal 3.3V regulators and an internal USB pull up
resistor
â Configurable IO for real world interface without external com-
ponents
â USB Specification Compliance
â Conforms to USB Specification, Version 2.0
â Conforms to USB HID Specification, Version 1.1
â Supports one Low-Speed USB device address
â Supports one control endpoint and two data endpoints
â Integrated USB transceiver with dedicated 3.3V regulator for
USB signalling and Dâ pull up.
â Enhanced 8-bit microcontroller
â Harvard architecture
â M8C CPU speed is up to 24 MHz or sourced by an external
clock signal
â Internal memory
â Up to 256 bytes of RAM
â Up to eight Kbytes of Flash including EEROM emulation
â Interface can auto configure to operate as PS/2 or USB
â No external components for switching between PS/2 and
USB modes
â No General Purpose IO (GPIO) pins needed to manage dual
mode capability
â Low power consumption
â Typically 10 mA at 6 MHz
â 10 μA sleep
â In system reprogrammability:
â Allows easy firmware update
â GPIO ports
â Up to 20 GPIO pins
â 2mA source current on all GPIO pins. Configurable 8 or
50 mA/pin current sink on designated pins.
â Each GPIO port supports high impedance inputs, config-
urable pull up, open drain output, CMOS/TTL inputs, and
CMOS output
â Maskable interrupts on all IO pins
â A dedicated 3.3V regulator for the USB PHY. Aids in signalling
and Dâ line pull up
â 125 mA 3.3V voltage regulator powers external 3.3V devices
â 3.3V IO pins
â 4 IO pins with 3.3V logic levels
â Each 3.3V pin supports high impedance input, internal pull
up, open drain output or traditional CMOS output
â SPI serial communication
â Master or slave operation
â Configurable up to 4 Mbit/second transfers in the master
mode
â Supports half duplex single data line mode for optical sensors
â 2-channel 8-bit or 1-channel 16-bit capture timer registers.
Capture timer registers store both rising and falling edge times.
â Two registers each for two input pins
â Separate registers for rising and falling edge capture
â Simplifies the interface to RF inputs for wireless applications
â Internal low power wakeup timer during suspend mode:
â Periodic wakeup with no external components
â 12-bit Programmable Interval Timer with interrupts
â Advanced development tools based on Cypress MicroSystems
PSoC⢠tools
â Watchdog timer (WDT)
â Low voltage detection with user configurable threshold
voltages
â Operating voltage from 4.0V to 5.5VDC
â Operating temperature from 0â70°C
â Available in 16 and 18-pin PDIP; 16, 18, and 24-pin SOIC;
24-pin QSOP, and 32-pin QFN packages
â Industry standard programmer support
1.1 Applications
The CY7C63310/CY7C638xx is targeted for the following
applications:
â PC HID devices
â Mice (optomechanical, optical, trackball)
â Gaming
â Joysticks
â Game pad
â General purpose
â Barcode scanners
â POS terminal
â Consumer electronics
â Toys
â Remote controls
â Security dongles
Cypress Semiconductor Corporation ⢠198 Champion Court
Document 38-08035 Rev. *J
⢠San Jose, CA 95134-1709 ⢠408-943-2600
Revised May 15, 2008
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