CY28443 Datasheet, PDF (1/25 Pages) Cypress Semiconductor – Clock Generator for Intel® Calistoga Chipset

PRELIMINARY
CY28443
Clock Generator for Intel^® Calistoga Chipset
Features
• Compliant to Intel^® CK410M
• Selectable CPU frequencies
• Differential CPU clock pairs
• 100-MHz differential SRC clocks
• 96-MHz differential dot clock
• 27-MHz Spread and Non-spread video clock
• 48-MHz USB clocks
• SRC clocks independently stoppable through
CLKREQ#[A:B]
• 96/100-MHz Spreadable differential video clock
• 33-MHz PCI clock
• Buffered Reference Clock 14.318-MHz
• Low-voltage frequency select input
• I²C support with readback capabilities
• Ideal Lexmark Spread Spectrum profile for maximum
electromagnetic interference (EMI) reduction
• 3.3V power supply
• 56-pin SSOP/TSSOP packages
CPU
SRC PCI REF DOT96 USB_48M LCD 27M
x2 / x3 x5/6/7 x6 x 2 x 1
x1
x1
x2
XIN
XOUT
SEL_CLKREQ
PCI_STP#
CPU_STP#
CLKREQ[A:B]#
ITP_SEL
FS[C:A]
Block Diagram
14.318MHz
Crystal
PLL Reference
CPU
PLL
Divider
FCTSEL1
VTT_PWRGD#/PD
SDATA
SCLK
LVDS
PLL
Divider
Fixed
PLL
Divider
27M
PLL
I2C
Logic
Divider
VDD
REF[0:1]
IREF
VDD
CPUT[0:1]
CPUC[0:1]
VDD
CPUT2_ITP/SRCT11
CPUC2_ITP/SRCC11
VDD
SRCT([2:5],[8:9])
SRCC([2:5],[8:9])
VDD
PCI[3:5]
VDD_PCI
PCIF[0:1]
VDD
SRCT0/100MT_SST
SRCC0/100MC_SST
VDD48
27M Spread
VDD48
DOT96T
DOT96C
VDD48
48M
VDD48
27M Non-spread
Pin Configuration
VDD 1
VSS 2
PCI3 3
PCI4 4
PCI5/FCTSEL1 5
VSS 6
VDD 7
ITP_SEL/PCIF0 8
PCIF1 9
VTT_PWRGD#/PD 10
VDD 11
FSA /48M 12
VSS 13
DOT96T/27M non Spread 14
DOT96C/27M Spread 15
FSB 16
SRCT0/100MT_SST 17
SRCC0/100MC_SST 18
SRCT2 19
SRCC2 20
VDD 21
SRCT3 22
SRCC3 23
SRCT4 24
SRCC4 25
SRCT5 _SATA 26
SRCC5_SATA 27
VDD 28
56 PCI2/SEL_CLKREQ
55 PCI_STP#
54 CPU_STP#
53 REF0/FSC
52 REF1/FCTSEL0
51 VSS
50 XIN
49 XOUT
48 VDD
47 SDATA
46 SCLK
45 VSS
44 CPUT0
43 CPUC0
42 VDD
41 CPUT1
40 CPUC1
39 IREF
38 VSSA
37 VDDA
36 SRCT11/CPUT2_itp
35 SRCC11/CPUC2_itp
34 VDD
33 SRCT9/CLKREQA
32 SRCC9/CLKREQB
31 SRCT8
30 SRCC8
29 VSS
Cypress Semiconductor Corporation • 198 Champion Court • San Jose, CA 95134-1709 • 408-943-2600
Document #: 38-07716 Rev *C
Revised October 17, 2005