DB839 Datasheet, PDF (8/20 Pages) CML Microcircuits – Two Variable Attenuators

Digitally Controlled Analog I/O Processor
8
MX839 PRELIMINARY INFORMATION
4.5.2 Write Only Register (8-Bit and 16-Bit)
HEX
ADDRESS/
COMMAN
D
$01
$D0
$D2
$D3
$D4
$D5
$D6
$D7
REGISTER
NAME
RESET
CLOCK
CONTROL
VARIABLE
ATTENUATOR (1)
VARIABLE
ATTENUATOR (2)
DAC
CONTROL
DAC1 DATA
(1)
*See Note 1
(2)
DAC2 DATA
(1)
*See Note 1
(2)
DAC3 DATA
(1)
*See Note 1
(2)
A/D
CONTROL
BIT 7
(D7)
N/A
0
0
0
NBIT
DAC1
BIT 7
0
BIT 7
0
BIT 7
0
0
MAG COMP ONE
$D8
LEVELS (1)
BIT 7
MAG COMP ONE
LEVELS (2)
BIT 7
MAG COMP TWO
$D9
LEVELS (1)
BIT 7
MAG COMP TWO
LEVELS (2)
BIT 7
MAG COMP THREE
$DA
LEVELS (1)
BIT 7
MAG COMP THREE
LEVELS (2)
BIT 7
MAG COMP FOUR
$DB
LEVELS (1)
BIT 7
MAG COMP FOUR
LEVELS (2)
BIT 7
BIT 6
(D6)
N/A
0
0
0
NBIT
DAC2
BIT 6
0
BIT 6
0
BIT 6
0
1
BIT 6
BIT 6
BIT 6
BIT 6
BIT 6
BIT 6
BIT 6
BIT 6
BIT 5
(D5)
BIT 4
(D4)
BIT 3
(D3)
BIT 2
(D2)
BIT 1
(D1)
N/A
0
MOD1
ENABLE
MOD2
ENABLE
NBIT
DAC3
N/A
0
BIT 4
BIT 4
0
N/A
0
BIT 3
BIT 3
DAC1
ENABLE
N/A
BIT 2
MOD1
BIT 2
MOD2
BIT 2
DAC2
ENABLE
N/A
DIVIDER
BIT 1
BIT 1
BIT 1
DAC3
ENABLE
BIT 5
BIT 4
BIT 3
BIT 2
BIT 1
0
0
0
0
BIT 9
BIT 5
BIT 4
BIT 3
BIT 2
BIT 1
0
0
0
0
BIT 9
BIT 5
BIT 4
BIT 3
BIT 2
BIT 1
0
0
0
0
BIT 9
A/DIN1 A/DIN2 A/DIN3 A/DIN4
READ ^{ACTIVE ACTIVE ACTIVE ACTIVE}
MAGNITUDE COMPARATOR UPPER LEVEL
BIT 5
BIT 4
BIT 3
BIT 2
BIT 1
MAGNITUDE COMPARATOR LOWER LEVEL
BIT 5
BIT 4
BIT 3
BIT 2
BIT 1
MAGNITUDE COMPARATOR UPPER LEVEL
BIT 5
BIT 4
BIT 3
BIT 2
BIT 1
MAGNITUDE COMPARATOR LOWER LEVEL
BIT 5
BIT 4
BIT 3
BIT 2
BIT 1
MAGNITUDE COMPARATOR UPPER LEVEL
BIT 5
BIT 4
BIT 3
BIT 2
BIT 1
MAGNITUDE COMPARATOR LOWER LEVEL
BIT 5
BIT 4
BIT 3
BIT 2
BIT 1
MAGNITUDE COMPARATOR UPPER LEVEL
BIT 5
BIT 4
BIT 3
BIT 2
BIT 1
MAGNITUDE COMPARATOR LOWER LEVEL
BIT 5
BIT 4
BIT 3
BIT 2
BIT 1
BIT 0
(D0)
N/A
BIT 0
BIT 0
BIT 0
0
BIT 0
BIT 8
BIT 0
BIT 8
BIT 0
BIT 8
0
BIT 0
BIT 0
BIT 0
BIT 0
BIT 0
BIT 0
BIT 0
BIT 0
Table 2: Write Only Register (8-Bit and 16-Bit)
Note
1. A second byte is expected by the 'C-BUS' interface only when the 'NBIT DACn' bit of the 'DAC Control Register' is
set high. Otherwise, the data transfer is a single byte (Bit 7 to Bit 0).
© 1998 MXxCOM Inc.
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