DB839 Datasheet, PDF (5/20 Pages) CML Microcircuits – Two Variable Attenuators

Digitally Controlled Analog I/O Processor
5
3 External Components
MX839 PRELIMINARY INFORMATION
XTAL
R1
XTAL/CLOCK
X1 _C2
C1
C-BUS
INTERFACE
XTAL ₁
24 ^DVDD
XTAL/CLOCK ₂
23 ^{MOD2 OUT}
SERIAL CLOCK ₃
22 ^{MOD1 OUT}
COMMAND DATA ₄
21 ^{MOD2 IN}
REPLY DATA
CS
IRQ
ADCIN1
5
20 ^{MOD1 IN}
6
MX839
19
AV_DD
N/C
7
18
8
17 ^DACOUT3
ADCIN2 ₉
16 ^DACOUT2
ADCIN3
R2
10
ADCIN4
11
V_{SS 12}
DACOUT1
15
14 ^N/C
13
V_BIAS
DV_DD
C3
DV_DD
R3
C5
AV_DD
C4 C6
Figure 2: Recommended External Components
R1
1M: ±5%
R2
22k: ±10%
R3 Note 1 10: ±10%
C1
22pF ±20%
C2
22pF ±20%
C3
0.1µF ±20%
C4 Note 1 0.1µF ±20%
C5
0.1µF ±20%
C6 Note 1 10.0µF ±20%
X1 Note 2, 3
±100ppm
Table 1: Recommended External Components
Notes:
1. These values should be determined in regard to the amount of supply filtering required for D/A outputs.
2. If an external clock is to be used, then it should be connected to Pin 2 and the components C1, C2, R1, and X1
omitted. The ADC clock frequency is derived from the crystal or external clock by means of internal programmable
dividers. See Section 6 for details of crystal or external clock frequency range.
3. For best results, a crystal oscillator design should drive the clock inverter input with signal levels of at least 40% of
V_DD, peak to peak. Tuning fork crystals generally cannot meet this requirement. To obtain crystal oscillator design
assistance, consult your crystal manufacturer.
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