DB839 Datasheet, PDF (4/20 Pages) CML Microcircuits – Two Variable Attenuators

Digitally Controlled Analog I/O Processor
4
MX839 PRELIMINARY INFORMATION
2 Signal List
Pin No.
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
Name
XTAL
XTAL/CLOCK
SERIAL CLOCK
COMMAND DATA
REPLY DATA
CS
IRQ
A/DIN1
A/DIN2
A/DIN3
A/DIN4
V_SS
V_BIAS
N/C
DACOUT1
DACOUT2
DACOUT3
N/C
AV_DD
MOD1 IN
MOD2 IN
MOD1
MOD2
DV_DD
Type
output
input
input
input
output
input
output
input
input
input
input
power
output
output
output
output
power
input
input
output
output
power
Description
The output of the on-chip oscillator inverter.
The input to the on-chip oscillator inverter, for external Xtal circuit or clock.
The 'C-BUS' serial clock input. This clock, produced by the µC, is used for
transfer timing of commands and data to and from the device. See Figure 5.
The 'C-BUS' serial data input from the µC. Data is loaded into this device in
8-bit bytes, MSB (B7) first, and LSB (B0) last, synchronized to the SERIAL
CLOCK. See Figure 5.
The 'C-BUS' serial data output to the µC. The transmission of REPLY DATA
bytes is synchronized to the SERIAL CLOCK under the control of the CS
input.
This tri-state output is held at high impedance when not sending data to the
µC. See Figure 5.
The 'C-BUS' data loading control function. This input is provided by the µC.
Data transfer sequences are initiated, completed or aborted by the CS signal.
See Figure 5.
This output indicates an interrupt condition to the µC by going to a logic '0'.
This is a 'wire-ORable' output, enabling the connection of up to 8 peripherals
to 1 interrupt port on the µC. This pin has a low impedance pulldown to logic
'0' when active and a high-impedance when inactive. An external pullup
resistor is required.
The conditions that cause interrupts are indicated in the IRQ FLAG register
and are effective if not disabled.
Analog to digital converter input 1 (A/D1)
Analog to digital converter input 2 (A/D2)
Analog to digital converter input 3 (A/D3)
Analog to digital converter input 4 (A/D4)
Negative supply (ground) for both analog and digital supplies.
An analog bias line for the internal circuitry, held at AV_DD/2. This pin must be
bypassed by a capacitor mounted close to the device pins.
No internal connection. Do not make any connection to this pin.
Digital to analog converter No. 1 output (DAC1)
Digital to analog converter No. 2 output (DAC2)
Digital to analog converter No. 3 output (DAC3)
No internal connection. Do not make any connection to this pin.
Positive analog supply. Analog levels and voltages are dependent upon this
supply. This pin should be bypassed to V_SS by a capacitor.
Input to MOD1 variable attenuator.
Input to MOD2 variable attenuator.
Output of MOD1 variable attenuator.
Output of MOD2 variable attenuator.
Positive digital supply. Digital levels and voltages are dependent upon this
supply. This pin should be bypassed to V_SS by a capacitor.
© 1998 MXxCOM Inc.
www.mxcom.com Tele: 800 638-5577 336 744-5050 Fax: [phone]
Doc. # 20480164.002
4800 Bethania Station Road, Winston-Salem, NC 27105-1201 USA
All trademarks and service marks are held by their respective companies.