CMX991 Datasheet, PDF (48/56 Pages) CML Microcircuits – Two-mode demodulator

RF Quadrature Transceiver / RF Quadrature Receiver
CMX991/CMX992
8.1.3 Operating Characteristics
The following conditions apply unless otherwise specified:
V_DD = AV_DD = DV_DD = 3.0V to 3.6V; V_SS = AV_SS = DV_SS, T_AMB = -40°C to +85°C, SLI disabled.
8.1.3.1 DC Parameters
DC Parameters
Total Current Consumption
Powersave Mode
V_BIAS Only
Operating Currents
Rx Only (with SLI)
Rx Only (SLI Disabled)
Rx IF and PLL Only
Synth Only
Tx Only (RF Output)
Tx Only (IF Output)
Current from V_DDIO
Logic ‘1’ Input Level
Logic ‘0’ Input Level
Notes
A, F
C
J
D
D
H
D
G
G
B
Min.
–
–
–
–
–
–
–
–
–
70%
–
Typ.
10
2.1
58
52
37
14
82
61
0.3
–
–
Max.
60
2.6
75
–
–
20
108
76
600
–
30%
Units
µA
mA
mA
mA
mA
mA
mA
mA
µA
V_DDIO
V_DDIO
Output Logic ‘1’ Level (l_OH = 0.6 mA)
Output Logic ‘0’ Level (l_OL = -1.0 mA)
Power-up Time
Reference Voltage
E
All Blocks Except Reference Voltage
E
Internal Bandgap Voltage (V_BG)
External Bias Voltage (V_BIAS) – derived from V_BG
80%
–
–
–
1.06
1.45
–
–
–
–
1.13
1.6
–
+0.4
V_DDIO
V
0.5
ms
10
µs
1.2
V
1.75
V
Notes: A. Powersave mode includes the state after General Reset with all analogue and digital supplies
applied and also the case with V_DD applied but with all analogue supplies disconnected (i.e. in
this later scenario, power from V_DD will not exceed the specified value whatever the state of the
registers).
B. Assumes 30pF on each C-BUS interface line and an operating serial clock frequency of 5MHz.
C. The stated current drawn here is with the bandgap reference and accompanying bias current
generators enabled only (register $11, b7), all other circuitry is disabled.
D. Not including any current drawn from the device pins by external circuitry:
Rx only – All Rx circuitry including SLI , synthesiser and bias generator.
Synth only – Synthesiser, NR Amplifier, VCO Buffer and bias generator.
E. As measured from the rising edge of CSN.
F. At T_AMB = 25ºC, not including any current drawn from the CMX991/CMX992 pins by external
circuitry.
G. Tx only – Tx circuitry plus synthesiser, VCO, buffer and bias generator. IF output excludes the
Tx Image Reject Mixer, but includes the IF Output buffer.
H. Rx IF and PLL – IF amplifier and I/Q mixers plus synthesiser, VCO, buffer and bias generator
J. Total current from AV_DD, DV_DD and V_DDIO.
 2015 CML Microsystems Plc
48
D/991_992/20