EV6240 Datasheet, PDF (30/47 Pages) CML Microcircuits – Opto-Isolated serial interface capability

Evaluation Kit for CMX624/CMX644A
1.6.5 Evaluation Tests
EV6240
1.6.5.1 BER Measurement (Not available in the current firmware revision).
To allow the user to perform Bit Error Rate Testing (BERT) the EF6240 firmware contains a BERT
routine. This facility requires the user to put the evaluation board into Test Mode (AT@E1) and modify
the BER Measurement Set Up (AT@Tn) to the appropriate configuration. The BERT routine can be
configured to operate in one of two ways; with a single on-board Modem connected to an external
simulator/modem, via the 2 or 4-wire line interfaces; or simply by connecting the two on-board
Modems together via the 2 or 4-wire line interfaces.
Note, the BERT routine is performed in synchronous mode and uses a preamble and sync byte when
it begins to allow the µC firmware to synchronise with the start of the bit stream. When the
configuration set up is complete BERT can commence by entering the AT@F1 command. The BER
Tester should be started before the user enters the AT@F1 command to ensure bit synchronisation is
achieved.
Hardware Setup
This function enables connection to BER Testers as follows:
TP42 (PIC16C77 µC Pin 19) to BER Tester Tx Data O/P
TP43 (PIC16C77 µC Pin 20) to BER Tester Tx Data Clock I/P
TP44 (PIC16C77 µC Pin 21) to BER Tester Rx Data I/P
TP45 (PIC16C77 µC Pin 22) to BER Tester Rx Data Clock I/P
The tester must be able to operate from an external clock. The timings of the clock provided from the
Evaluation board µC are as follows:
Rx Clock
1 Byte Time
Tx Clock
t_A
1 Byte Time
t_B
Figure 7 Evaluation board µC clock outputs
Times t_A and t_B vary as the clocks are adjusted to fit the exact byte periods of the evaluation devices.
Data is assumed to be clocked in and out of the Tester on the rising edge of either Rx or Tx clock.
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© 1999 Consumer Microcircuits Limited
UM6240/3