CMI8787 Datasheet, PDF (19/28 Pages) C-Media Electronics – High Performance PCI Audio Processor

C-Media High Performance PCI Audi o Processor
Oxygen^TM HD CMI8787 Datasheet v0.5
4.5.2 CONTROL INTERFACE TIMING - 3 - WIRE MODE
Control Interface Timing -3- Wire Diagram
Note: latch data at XSPI_CEN clock low mode , XSPI_CEN clock can be low or high mode
Test Conditions
DVDD = 3.3V, DGND =0V,TA=+25^o C,SPI clock 160 ns,unless otherwise stated
Control Interface Timing -3- Wire Parameters
Parameter
Symbol
Min
Typ
XSPI_CLK rising edge to XSPI_CEN rising
Tscs
edge
120
-
XSPI_CLK pulse cycle time
Tscy
160
-
XSPI_CLK pulse width low
Tscl
80
-
XSPI_CLK pulse width high
Tsch
80
-
XSPI_DOUT to XSPI_CLK set-up time
Td s u
40
-
XSPI_DOUT to XSPI_CLK hold time
Tdho
40
-
XSPI_CEN rising to SCLK rising
Tcss
40
-
Max Units
-
ns
-
ns
-
ns
-
ns
-
ns
-
ns
-
ns
18
C-MEDIA CONFIDENTIAL