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CMI8787 Datasheet, PDF (14/28 Pages) C-Media Electronics – High Performance PCI Audio Processor
XA0/
XSPI_CEN0
XSSCL/
XGPIO3
XSSDA/
XGPIO4
XMCU_INT
XSLAVE_RDY/
XGPIO1
XSPDIFI
XSPDIFO
XEECS
XEESK/
XSPI_CEN 4
XEEDI
XEEDO/
XSPI_CEN 5
XGPI0
XGPI1
XGPI2
XGPI3
XGPI4
XGPI5
XGPIO0
XGPIO1/
XSLAVE_RDY
XGPIO2
XGPIO3/XSSCL
XGPIO4/XSSDA
XGPIO5/
XADC3_MCLK
C-Media High Performance PCI Audi o Processor
OxygenTM HD CMI8787 Datasheet v0.5
0: XADC1_SDIN1).
77
DIO, PU 2-wire serial bus codec address A0. This pin is shared with SPI
chip enable, which select the codec #0 to be controlled. It is also
used as XGPIO3~4 and SSCL/SSDA configuration (input, 1:
GPIO3~4, 0: SSCL/SSDA) at the rising edge of XRST.
2-Wire Slave Serial Bus
52
DIO, PU 2-wire serial bus clock. This pin is shared with XGPIO3.
53
DIO, PU 2-wire serial bus data. This pin is shared with XGPIO4.
72
DO Interrupt output for external Micro Control Unit (MCU).
50
DIO, PD 2-wire serial bus data ready. This pin is shared with XGPIO1.
S/PDIF Interface
107
DI S/PDIF receiver.
116
DO S/PDIF transmitter.
EEPROM Interface
67
DIO, PD EEPROM chip enable (output). It is also used as power on
EEPROM CS delay configuration (input, 0: no delay, 1: delay 1
clock) at the rising edge of XRST
68
DO EEPROM serial clock. This pin is shared with SPI chip enable,
which select the codec #4 to be controlled
66
DI, PU EEPROM serial data in
69
DO EEPROM serial data out. This pin is shared with SPI chip enable,
which select the codec #5 to be controlled
Jack Detect GPI Interface
108
DI, PD JACK A detection input
109
DI, PD JACK B detection input
110
DI, PD JACK C detection input
111
DI, PD JACK D detection input
112
DI, PD JACK E detection input
113
DI, PD JACK F detection input
GPIO Interface
49
DIO, PD GPIO0, default output Low.
50
DIO, PD GPIO1, default output Low. This pin is shared with I2C Slave data
ready.
51
DIO, PD GPIO2, default input.
52
DIO, PU GPIO3, default output Low. This pin is shared with I2C Slave
serial clock.
53
DIO, PU GPIO4, default input. This pin is shared with I2C Slave serial data
98
DIO, PD GPIO5, default output Low. This pin is shared with
XADC3_MCLK, which determined by XTXD input configuration
13
C-MEDIA CONFIDENTIAL