CPC7582 Datasheet, PDF (8/12 Pages) Clare, Inc. – Line Card Access Switch

CPC7582
Functional Description
Introduction
The CPC7582 has four states:
• Idle/talk state (line break switches SW1, and SW2
closed, ringing switches SW3, SW4 open and loop
access switches SW5, SW6 open),
• Ringing state (line break switches SW1, and SW2
open, ringing switches SW3, SW4 closed and loop
access switches SW5, SW6 open)
• Loop access (line break switches SW1, and SW2
open, ringing switches SW3, SW4 open and loop
access switches SW5, SW6 closed)
• All Off state (line break switches SW1, and SW2
open, ringing switches SW3, SW4 open and loop
access switches SW5, SW6 open)
The CPC7582 offers break-before-make and make-
before-break switching with simple logic level input con-
trol. Solid state switch construction means no impulse
noise is generated when switching during ring cadence
or ring trip, thus eliminating the need for external “zero
cross” switching circuitry. State control is via logic level
input so no additional driver circuitry is required. The
line break switches SW1 and SW2 are linear switches
that have exceptionally low RDS_ON and excellent
matching characteristics. The ringing access switch
SW4 has a breakdown voltage rating of >480V which is
sufficiently high, with proper protection, to prevent
breakdown in the presence of a transient fault condition
(i.e., passing the transient on to the ring generator).
Integrated into the CPC7582 is a diode bridge/SCR
clamping circuit, current limiting and thermal shut-
down mechanism to provide protection to the SLIC
device during a fault condition. Positive and negative
surges are reduced by the current limiting circuitry and
steered to ground via diodes and the integrated SCR.
Power cross transients are also reduced by the cur-
rent limiting and thermal shutdown circuits. Please
note that only the CPC7582BA has the integrated pro-
tection SCR.
To protect the CPC7582 from an overvoltage fault
condition, use of a secondary protector is required.
The secondary protector must limit the voltage seen at
the tip and ring terminals to a level below the max
breakdown voltage of the switches. To minimize the
stress on the solid-state contacts, use of a foldback or
crowbar type secondary protector is recommended.
With proper selection of the secondary protector, a
line card using the CPC7582 will meet all relevant
ITU, LSSGR, FCC or UL protection requirements.
The CPC7582 operates from a +5V supply only. This
gives the device extremely low idle and active power
dissipation and allows use with virtually any range of
battery voltage. A battery voltage is also used by the
CPC7582 as a reference for the integrated protection
circuit. In the event of a loss of battery voltage, the
CPC7582 will enter an “all off” state.
Switch Timing
The CPC7582 provides, when switching from the ring-
ing state to the idle/talk state, the ability to control the
timing when the ringing access switches SW3 and
SW4 are released relative to the state of the line break
switches SW1 and SW2 using simple logic level input.
This is referred to a “make before break” or “break
before make” operation. When the line break switch
contacts (SW1, SW2) are closed (or made) before the
ringing access switch contact (SW3, SW4) is opened
(or broken), this is referred to a ‘make-before-break’
operation. Break-before-make operation occurs when
the ringing access contact (SW3, SW4) is opened
(broken) before the line break switch contacts (SW1,
SW2) are closed (made). With the CPC7582 the
“make before break” and “break before make” opera-
tions can easily be selected by applying logic level
inputs to pins 9 and 10 (IN_ring and IN_access) of the
device.
The logic sequences for either mode of operation are
given in Tables 6 and 7. Logic states and explanations
are given in Table 9.
Break-before make operation can also be achieved
using pin 7 (TSD) as an input. In table 7 lines 2 and 3
it is possible to induce the switches to “all off” by
grounding pin 7 (TSD) instead of apply logic input to
the pins. This has the effect of overriding the logic
inputs and forcing the device to the “all off” state. Hold
this input state for 25ms. During this hold period, tog-
gle the inputs from the ringing state (10) to the idle/talk
state (00). After the 25ms release pin 7 (TSD) to return
the switch control to the input pins 9 and 10 and reset
the device to the idle/talk state.
Setting TSD to +5V will allow switch control using the
logic pins 9 and 10. This setting, however, will also dis-
able the thermal shutdown circuit and is therefore not
recommended. When using logic controls via the input
pins 9 and 10, pin 7 (TSD) should be allowed to float.
As a result the two recommended states when using
pin 7 (TSD) as a control are 0 which forces the device
to the “all of state” or float which allows logic inputs to
pins 9 and 10 to remain active. This may require use
of an open collector buffer.
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