CPC5710N Datasheet, PDF (8/9 Pages) Clare, Inc. – Phone Line Monitor (PLM) IC

CPC5710N
With the application circuit in Figure 4, the series
capacitors serve to reduce the magnitude of high-
amplitude, low-frequency ring signals, making the ring
detection threshold of the CPC5710N variable with the
frequency the ringing signal. With the circuit as given,
CMPOUT will change states with a 15 Hz ringing
signal at approximately 48 V_PEAK. For a 68 Hz ring
signal, CMPOUT will change states with a ringing
signal amplitude of approximately 11.5 V_PEAK.
In applications where CPC5710N will be used only as
a ring level detector, or if significant attenuation of the
amplified signal can be tolerated, the frequency
variability of the ring detection threshold can be
reduced by increasing the value of the resistors and
capacitors in series with the input.
Clare Application Note AN-117 Customize Caller ID Gain
and Ring Detect Voltage Threshold is a spreadsheet for
trying different component values in this circuit for
LITELINK snoop circuit applications.
4. Power Quality
CPC5710N works best with a clean power supply. To
clean up power supply noise, Clare, Inc., recommends
using a pi network on the V_DD pin as shown in
Figure 7, if needed.
Figure 7. Optional Power Supply pi Network
3.3 or 5 V
R100
10
C100
1
C101 ^FB100
10
600 Ω
200 mA ^A
A
To V_DD
Pin 1
Note: For lower-frequency noise, use a 220 µH
inductor in series with R100.
5. Manufacturing Information
The CPC5710N branding (package imprinting) leaves
off the last character of the part number due to
package space limitations.
5.1 Package Dimensions
CPC5710N uses JEDEC standard 8-pin SOIC
packaging. See JEDEC Publication 95, MS-012 for 3.75
(0.150) small-outline package dimensions.
5.2 Soldering
5.2.1 Moisture Reflow Sensitivity
Clare has characterized the moisture reflow sensitivity
of this product using IPC/JEDEC standard J-STD-
020A and classifies it as MSL (Moisture Sensitivity
Level) 1, not moisture sensitive.
8
www.clare.com
Rev. 1.0 12/16/2002