CS4382 Datasheet, PDF (9/42 Pages) Cirrus Logic – 114 dB, 192 kHz 8-Channel D/A Converter

CS4382
DSD - SWITCHING CHARACTERISTICS (For KQZ T_A = -10 to +70 °C; Logic 0 = GND; VLS =
1.8 V to 5.5 V; Logic 1 = VLS Volts; C_L = 30 pF)
Parameter
Symbol
Min
Typ Max Unit
Master Clock Frequency
(Note 18)
4.096
-
38.4 MHz
MCLK Duty Cycle
(All DSD modes)
40
50
60
%
DSD_SCLK Pulse Width Low
DSD_SCLK Pulse Width High
DSD_SCLK Frequency
(64x Oversampled)
(128x Oversampled)
t_sclkl
t_sclkh
20
20
1.024
2.048
-
-
ns
-
-
ns
-
3.2
MHz
-
6.4
MHz
DSD_L / _R valid to DSD_SCLK rising setup time
DSD_SCLK rising to DSD_L or DSD_R hold time
t_sdlrs
20
t_sdh
20
-
-
ns
-
-
ns
Note: 18. Min is 4 times 64x DSD or 2 times 128x DSD, and Max is 12 times 64x DSD or 6 times 128x DSD. The
proper MCLK to DSD_SCLK ratio must be set either by the DIF registers or the M0:2 pins
DSD_SCLK
DSD_L, DSD_R
t _sclkh
t _sclkl
t _sdlrs t _sdh
Figure 2. Direct Stream Digital - Serial Audio Input Timing
DS514F1
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