CS42518_05 Datasheet, PDF (59/91 Pages) Cirrus Logic – 110 dB, 192 kHz 8-Ch Codec with S/PDIF Receiver

6.14 Channel Invert (address 17h)
7
INV_B4
6
INV_A4
5
INV_B3
4
INV_A3
3
INV_B2
2
INV_A2
CS42518
1
INV_B1
0
INV_A1
6.14.1 INVERT SIGNAL POLARITY (INV_XX)
Default = 0
0 - Disabled
1 - Enabled
Function:
When enabled, these bits will invert the signal polarity of their respective channels.
6.15 Mixing Control Pair 1 (Channels A1 & B1)(address 18h)
Mixing Control Pair 2 (Channels A2 & B2)(address 19h)
Mixing Control Pair 3 (Channels A3 & B3)(address 1Ah)
Mixing Control Pair 4 (Channels A4 & B4)(address 1Bh)
7
Px_A=B
6
Reserved
5
Reserved
4
Px_ATAPI4
3
Px_ATAPI3
2
Px_ATAPI2
1
Px_ATAPI1
0
Px_ATAPI0
6.15.1 CHANNEL A VOLUME = CHANNEL B VOLUME (PX_A=B)
Default = 0
0 - Disabled
1 - Enabled
Function:
The AOUTAx and AOUTBx volume levels are independently controlled by the A and the B Channel
Volume Control registers when this function is disabled. The volume on both AOUTAx and AOUTBx
are determined by the A Channel Volume Control registers (per A-B pair), and the B Channel Volume
Control registers are ignored when this function is enabled.
DS584F1
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