WM8235 Datasheet, PDF (51/154 Pages) Wolfson Microelectronics plc – 70MSPS 9-Channel AFE with Sensor Timing Generation and LVDS/CMOS Data Output

REGISTER
ADDRESS
R104 (68h)
R105 (69h)
R106 (6Ah)
R191 (BFh)
R192 (C0h)
R193 (C1h)
R194 (C2h)
WM8235
BIT
LABEL
DEFAULT
DESCRIPTION
1:0
AGC_TARGETIN5
00
MSB of AGC target level for IN5
[9:8]
7:0
AGC_TARGETIN6 0000_0000 LSB of AGC target level for IN6
[7:0]
1:0
AGC_TARGETIN6
00
MSB of AGC target level for IN6
[9:8]
7:0
PEAKDET_RISE
0000_0000 LSB of PEAKDET_RISE[14:0]
[7:0]
peak detection start pixel count
6:0
PEAKDET_RISE
000_0000 MSB of PEAKDET_RISE[14:0]
[14:8]
peak detection start pixel count
7:0
PEAKDET_FALL
0000_0000 LSB of PEAKDET_FALL[14:0]
[7:0]
peak detection start pixel count
6:0
PEAKDET_FALL
000_0000 MSB of PEAKDET_FALL[14:0]
[14:8]
peak detection start pixel count
LINE-BY-LINE OPERATION
Certain linear sensors give colour output on a line-by-line basis. i.e. a full line of red pixels followed by
a line of green pixels followed by a line of blue pixels.
The WM8235 can accommodate this type of input by setting the LINEBYLINE register bit high. The
offset and gain values that are applied to every input channel can be selected, by internal
multiplexers, to come from IN7, IN8 or IN9 offset and gain registers. This allows the gain and offset
values for each of the input colours to be setup individually at the start of a scan.
When register bit ACYC=0 the gain and offset multiplexers are controlled via the INTM[1:0] register
bits. When INTM=00 the IN7 offset and gain control registers are used to control every input channel,
INTM=01 selects the IN8 offset and gain registers and INTM=10 selects the IN9 offset and gain
registers to control every input channel.
When register bit ACYC=1, ‘auto-cycling’ is enabled, and the input channel switches to the next offset
and gain registers in the sequence by TGSYNC. The sequence is IN7  IN8  IN9  IN7… offset
and gain registers applied to every input channel.
INTM=00
INTM=01
INTM=10
INTM=11
AGAININ7, DGAININ7, DACIN7
AGAININ8, DGAININ8, DACIN8
AGAININ9, DGAININ9, DACIN9
Reserved
ACYC=0
ACYC=1
INTM Mode (depends on INTM register)
Auto Cycling mode (IN7 -> IN8 -> IN9)
Normal Operation
LINEBYLINE 0x23[0]
INTM 0x23[3:2]
ACYC 0x23[1]
TGSYNC
IN1
IN2
IN3
IN4
IN5
IN6
IN7
IN8
IN9
0
00
01
AGAININ1, DGAININ1, DACIN1
AGAININ2, DGAININ2, DACIN2
AGAININ3, DGAININ3, DACIN3
AGAININ4, DGAININ4, DACIN4
AGAININ5, DGAININ5, DACIN5
AGAININ6, DGAININ6, DACIN6
AGAININ7, DGAININ7, DACIN7
AGAININ8, DGAININ8, DACIN8
AGAININ9, DGAININ9, DACIN9
AGAININ8,
DGAININ8,
DACIN8
00
AGAININ7,
DGAININ7,
DACIN7
LINEBYLINE
INTM Mode
1
01
Must be set to 0
AGAININ8,
DGAININ8,
DACIN8
AGAININ9,
DGAININ9,
DACIN9
Normal Operation
0
11
AGAININ1, DGAININ1, DACIN1
AGAININ2, DGAININ2, DACIN2
AGAININ3, DGAININ3, DACIN3
AGAININ4, DGAININ4, DACIN4
AGAININ5, DGAININ5, DACIN5
AGAININ6, DGAININ6, DACIN6
AGAININ7, DGAININ7, DACIN7
AGAININ8, DGAININ8, DACIN8
AGAININ9, DGAININ9, DACIN9
Figure 33 Line-by-Line Operation (ACYC=0, INTM mode)
Rev 4.6
51