WM8235 Datasheet, PDF (39/154 Pages) Wolfson Microelectronics plc – 70MSPS 9-Channel AFE with Sensor Timing Generation and LVDS/CMOS Data Output

WM8235
Test Conditions
AVDD = LDOVDD = DBVDD = 3.3V, AGND = LDOGND = DBGND= 0V, T_A = 25C, unless otherwise stated.
PARAMETER
TGSYNC Setup time
(only for slave mode)
Pixel counter start timing
(only for slave mode)
TGSYNC high period
(only for slave mode)
TGSYNC low period
(only for slave mode)
Data trigger timing delay
TG pulse output timing delay
Note:
SYMBOL
t_SCKSY
TEST CONDITIONS
t_COUNTD
t_SYH
t_SYL
t_TRIGD
t_PCKD
LVDS 10-bit 5pair mode
Other output mode
MIN
t_PER / 4
1
1
TYP
t_PER / 2
2
MAX
3 * t_PER / 4
11
10
2
1clock = t_PER (MCLK cycle period)
UNITS
ns
clock
clock
clock
clock
clock
clock
REGISTER
BIT
LABEL
DEFAULT
DESCRIPTION
ADDRESS
R160 (A0h)
7:4
OFFSET[3:0]
0000
offset count (only for slave mode)
2
POLSYNC
0
polarity of Sync signal
0 = positive edge, 1 = negative edge
1
TGMD
0
TG operation mode
0 = slave, 1 = master
0
TG_EN
0
TG enable
0 = disable, 1 = enable
R161 (A1h)
7:0
LLENGTH[7:0]
0000_0000 the number of pixels in 1line (only for master mode)
R162 (A2h)
6:0
LLENGTH[6:0]
000_0000 the number of pixels in 1line (only for master mode)
TG PULSE AND TRIGGER DATA
C_CK1
C_CK2
VSMP
TGCK
pixcnt
P_CK1
(Selected from P0-P7)
P_CK2
(Selected from P0-P7)
P_CK3
(Selected from P0-P7)
DataTrig
(FLUGPIX is selected )
Datatrig_out
(FLUGPIX is selected )
DataTrig
(PO* is Selectd )
DataTrig_out
(PO* is Selectd )
TP1
TP1
High@TP1
TP2
TP3
FLUGPIX
TP2
Low@TP2
TP3
HIgh@TP3
tTRIGD
tTRIGD
Figure 24 TG Pulse Toggle Setting and Data Trigger Timing
TP3
TP3
Low@TP3
TP4
TP5
TP4 TP5
High@TP4 Low@TP5
TP4
High@TP4
TP6
TP6
Low@TP6
tTRIGD
Rev 4.6
39