CDB5461 Datasheet, PDF (5/27 Pages) Cirrus Logic – Evaluation Board and Software

CDB5461
1.2.2 Digital Section
The schematics for the digital section are
shown in Figure 10 on page 22. The digital
section contains the microcontroller, test
switches, a Maxim MAX3232 interface chip,
32K bytes of SRAM, and one serial EEPROM.
The test switches aid in debugging communi-
cation problems between the CDB5461 and
the PC. The microcontroller derives its clock
from a 20.0 MHz crystal. From this, The RS-
232 data conversion IC (10) is configured to
communicate via RS-232 at 9600 baud, no
parity, 8-bit data, and 1 stop bit.
1.2.3 Power Supply Section
Figure 11 on page 23 illustrates the power
supply connections to the evaluation board.
The VA+ post supplies the positive analog
section of the evaluation board, the LT1019,
and the ADC. The VA- post supplies the nega-
tive analog voltage circuitry. This terminal is
grounded when powering the CDB5461 from a
single +5 Volt analog supply. The VD+ post
supplies the digital section of the ADC and lev-
el shifter. The Vu+ post supplies the digital
section of the evaluation board, the 8051, the
reset circuitry, and the RS-232 interface cir-
cuitry. The board’s digital section, supplied via
Vu+ post, must be +5 Volts only. Table 2
shows the various power connections with the
required jumper settings on J12 and J11.
1.3 Using the Evaluation Board
The CS5461 contains a programmable gain
amplifier (PGA), two ∆Σ modulators, two high
rate filters, an on-chip reference, and power
calculation engine to compute Energy, V_RMS,
I_RMS, and Instantaneous Power. The PGA
sets the input levels of the current channel at
either 50 mV_RMS or 250 mV_RMS (for VREFIN =
2.5 V). The on-chip reference can provide the
necessary 2.5 V reference. This output (VRE-
FOUT) is used to supply the VREFIN pin with
2.5 V. The ∆Σ modulators and high rate digital
filter allow the user to measure instantaneous
voltage, current, and power at a output word
rate of 4000 Hz when a 4.096 MHz clock
source is used.
Table 3 on page 6 describes the various head-
ers, jumpers and DIP switches on the
CDB5461 evaluation board. DIP switch S1 is
used to control the 8051. Table 4 on page 7 il-
lustrates the various settings of the DIP switch
S1. The S1-3 switch should be set to the
Power Supplies
Analog Digital
+5V
+5V
+5V
+3V
Power Post Connections
VA+ VA- GND VD+
Vu+
+5 NC GND
+5
NC
Jumpers
J12
J11
Vu+ O
VD+ O
VD+ O
VA+ O
O VDDD
O VDDD
O D+
O D+
VA- _{O O GND}
A- O O GND
+5 NC GND
+3
Vu+ O O VDDD
+5
VD+ O O VDDD
VA- _{O O GND}
VD+ O O D+
A- O O GND
VA+ O O D+
Table 2. Power Supply Connections
5