CS42432_07 Datasheet, PDF (43/58 Pages) Cirrus Logic – 108 dB, 192 kHz 4-In, 6-Out TDM CODEC

7.6.4
CS42432
ADC2 Single-Ended Mode (ADC2 SINGLE)
Default = 0
0 - Disabled; Differential input to ADC2
1 - Enabled; Single-Ended input to ADC2
Function:
When enabled, this bit allows the user to apply a single-ended input to the positive terminal of ADC2. A
+6 dB digital gain is automatically applied to the serial audio data of ADC2. The negative leg must be driv-
en to the common mode of the ADC. See Figure 20 on page 48 for a graphical description.
7.7 Transition Control (Address 06h)
7
6
DAC_SNGVOL DAC_SZC1
5
DAC_SZC0
4
AMUTE
3
2
1
MUTE ADC_SP ADC_SNGVOL ADC_SZC1
0
ADC_SZC0
7.7.1
Single Volume Control (DAC_SNGVOL, ADC_SNGVOL)
Default = 0
Function:
The individual channel volume levels are independently controlled by their respective Volume Control reg-
isters when this function is disabled. When enabled, the volume on all channels is determined by the
AOUT1 and AIN1 Volume Control register and the other Volume Control registers are ignored.
7.7.2
Soft Ramp and Zero Cross Control (ADC_SZC[1:0], DAC_SZC[1:0])
Default = 00
00 - Immediate Change
01 - Zero Cross
10 - Soft Ramp
11 - Soft Ramp on Zero Crossings
Function:
Immediate Change
When Immediate Change is selected, all volume-level changes will take effect immediately in one step.
Zero Cross
Zero Cross Enable dictates that signal level changes, either by gain changes, attenuation changes or mut-
ing, will occur on a signal zero crossing to minimize audible artifacts. The requested level change will oc-
cur after a timeout period between 512 and 1024 sample periods (10.7 ms to 21.3 ms at 48 kHz sample
rate) if the signal does not encounter a zero crossing. The zero cross function is independently monitored
and implemented for each channel.
Soft Ramp
Soft Ramp allows level changes, either by gain changes, attenuation changes or muting, to be implement-
ed by incrementally ramping, in 1/8 dB steps, from the current level to the new level at a rate of 1 dB per
8 left/right clock periods.
Soft Ramp on Zero Crossing
DS673F2
43