CS4298 Datasheet, PDF (33/52 Pages) Cirrus Logic – SoundFusion Audio/Modem Codec 97 (AMC 97)

CS4298
6.1.29 GPIO Pin Configuration (Index 4Ch)
D15 D14 D13 D12 D11 D10 D9
D8
D7
D6
D5
D4
D3
D2
D1
D0
0
0
0
0
0
0 GC9 GC8 GC7 GC6 GC5 GC4 GC3 GC2 GC1 GC0
GC[9:0] GPIO Pin Configuration. When set defines the corresponding GPIO pin as an input
Default 03FFh
After a cold reset, power up, or modem register reset (see Extended Modem ID (Index 3Ch)) all
GPIO pins are configured as inputs.
6.1.30 GPIO Pin Polarity/Type Configuration (Index 4Eh)
D15 D14 D13 D12 D11 D10 D9
D8
D7
D6
D5
D4
D3
D2
D1
D0
1
1
1
1
1
1 GP9 GP8 GP7 GP6 GP5 GP4 GP3 GP2 GP1 GP0
GP[9:0]
GPIO Pin Configuration. The definition of GP[9:0] changes based on the pin defined as an input or an
output by GC[9:0] of GPIO Pin Configuration (Index 4Ch).
Default FFFFh
When the GPIO pin is defined as an input, its status is reported in the GPIO Pin Status (Index 54h)
register as well as Slot 12.
GCx
0
0
1
1
GPx
0
1
0
1
Function
Output
Output
Input
Input
CMOS drive
Open drain
Active Low
Active High (default)
Table 7. GPIO Input/Output Configuration
6.1.31 GPIO Pin Sticky (Index 50h)
D15 D14 D13 D12 D11 D10 D9
D8
D7
D6
D5
D4
D3
D2
D1
D0
GS9 GS8 GS7 GS6 GS5 GS4 GS3 GS2 GS1 GS0
GS[9:0] GPIO Pin Sticky. If set, the GPIO pin input is latched.
Default 0000h
If a GPIO is defined as “sticky” the input requires a transition of the GPIO input pin to set the corre-
sponding bit in Slot 12 and the GPIO Pin Status (Index 54h) register. When “sticky” is set the corre-
sponding bit in GPIO Pin Polarity/Type Configuration (Index 4Ah) register determines which edge
of the GPIO pin will set GI[x]. If GP[x] is set, a low to high transition sets the GI[x] bit. A high to
low transition sets GI[x] if GP[x] is clear. Once set, writing a 0 to GI[x] will clear the “sticky” input.
DS315PP2
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