CS4218 Datasheet, PDF (32/44 Pages) Cirrus Logic – 16-Bit Stereo Audio Codec

CS4218
SSYNC - Serial Port Sync Signal, PIN 1(L), 39(Q).
Indicates the start of a digital audio frame. SSYNC must be synchronous to the master clock.
SMODE1 - Serial Mode Select, PIN 29(L), 23(Q).
One of three pins that select the serial mode and function of the multifunction pins.
SMODE2 - Serial Mode Select, PIN 32(L), 26(Q).
One of three pins that select the serial mode and function of the multifunction pins.
SMODE3 - Serial Mode Select, PIN 41(L), 35(Q).
One of three pins that select the serial mode and function of the multifunction pins.
Multifunction Digital Pins
MF1:F1 - Format bit 1 in SM3 and SM5, PIN 40(L), 34(Q).
In SM3-M, SM3-MM, and SM5, this pin is a format bit and is used as one of three sample
frequency select pins, or as one of two bits-per-frame select pins when in SM3-S or SM3-MS.
MF1:CDOUT - Control Data Output in SM4, PIN 40(L), 34(Q).
In serial mode 4 this pin is the data output for the control port which contains status
information.
MF2:F2 - Format bit 2 in SM3 and SM5, PIN 39(L), 33(Q).
In SM3-M, SM3-MM, and SM5, this pin is a format bit and is used as one of three sample
frequency select pins , or as one of two bits-per-frame select pins when in SM3-S or SM3-MS.
MF2:CDIN - Control Data Input in SM4, PIN 39(L), 33(Q).
In SM4 this pin is the control port data input which contains data such as gain and attenuation
settings as well as input select, mute, and digital output bits.
MF3:F3 - Format bit 3 in SM3 and SM5, PIN 35(L), 29(Q).
In SM3-M, SM3-MM, and SM5, this pin is a format bit and is used as one of three sample
frequency select pins. In SM3-S and SM3-MS, the pin reverts to being a general purpose input.
MF3:CCLK - Control Data Clock in SM4, PIN 35(L), 29(Q).
In SM4 this pin is the control port serial bit clock which latches data from CDIN on the falling
edge, and outputs data onto CDOUT on the rising edge.
MF4:MA - Master sub-mode in SM3, PIN 36(L), 30(Q).
In SM3, this pin selects either master or slave sub-modes. When MF4:MA = 1, the codec is in
master sub-modes and outputs SSYNC and SCLK. When MF4:MA = 0, the codec is in slave
sub-modes and receives SSYNC and SCLK from an external source that must be frequency
locked to CLKIN.
MF4 - SM5, PIN 36(L), 30(Q).
In SM5, this pin is not used and should be tied to VD.
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