EP9307 Datasheet, PDF (25/48 Pages) Cirrus Logic – ARM9 SOC WITH ETHERNET USB DISPLAY AND TOUCHSCREEN

EP9307
ARM9 SOC with Ethernet, USB, Display and Touchscreen
Static Memory Burst Read Cycle
Parameter
CSn assert to Address 1 transition time
Address 2 assert time
AD hold from CSn deassert time
CSn assert time
CSn to RDn assert delay time
RDn assert time
CSn to DQMn assert delay time
DQMn assert time
DA to AD setup time
DA to CSn setup time
AD transition to DA transition hold time
CSn deassert to DA transition hold time
Symbol
t_ADd1
t_ADd2
t_ADh
t_CSpw
t_RDd
t_RDpw
t_DQMd
t_DQMpw
t_DAs1
t_DAs2
t_DAh1
t_DAh2
Min
-
-
-
-
-
-
-
-
-
-
-
0
Typ
t_HCLK × (WST1 + 1)
t_HCLK × (WST2 + 1)
t_HCLK × 2
t_HCLK × ((WST1 + 1) + 4(WST2 + 1))
0
t_HCLK × ((WST1 + 1) + 4(WST2 + 1))
4
t_HCLK × ((WST1 + 1) + 4(WST2 + 1))
6
t_HCLK + 6
0
0
Max
-
-
-
-
-
-
-
-
-
-
-
-
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Note: These characteristics are valid when the Page Mode Enable (Burst Mode) bit is set. See the User's Guide for details.
AD
CSn
WRn
t_RDd
RDn
DQMn
t_DQMd
DA
WAIT
t_ADd1
t_ADd2
t_ADd2
t_CSpw
t_ADh
t_DAs1
t_RDpw
t_DAh1
t_DQMpw
t_DAh1
t_DAs1
t_DAs1
t_DAh1
t_DAh2
t_DAs2
Figure 12. Static Memory Burst Read Cycle Timing Measurement
DS667PP3
©Copyright 2004 Cirrus Logic (All Rights Reserved)
25