CS4225 Datasheet, PDF (25/30 Pages) Cirrus Logic – Digital Audio Conversion System

CS4225
AIN2L, AIN2R - Left and Right Channel Mux Input 2
Analog signal input connections for the right and left channels for multiplexer input 2.
AIN3L, AIN3R - Left and Right Channel Mux Input 3
Analog signal input connections for the right and left channels for multiplexer input 3.
AINAUX - Auxiliary Line Level Input
Analog signal input for the 12-bit A/D converter. In software mode, setting the AIM bit causes
AINAUX to replace the left analog input at the multiplexer input.
Analog Outputs
AOUT1, AOUT2, AOUT3, AOUT4 - Audio Outputs
The analog outputs from the 4 D/A converters. Each output can be independently controlled for
output amplitude.
CMOUT - Common Mode Output
This common mode voltage output may be used for level shifting when DC coupling is desired.
The load on CMOUT must be DC only, with an impedance of not less than 25kΩ. CMOUT
should be bypassed with a 0.47µF to AGND.
VREF - Voltage Reference Output, Pin 21
The on-chip generated ADC/DAC reference voltage is brought out to this pin for decoupling
purposes. This output must be bypassed with a 10µF capacitor in parallel with a 0.1µF
capacitor to the adjacent AGND pin. No other external load may be connected to this output.
Digital Interface Signals
SDIN1 - Serial Data Input 1
Digital audio data for the DACs 1 and 2 is presented to the CS4225 on this pin.
SDIN2 - Serial Data Input 2
Digital audio data for the DACs 3 and 4 is presented to the CS4225 on this pin.
SDOUT1- Serial Data Output 1
Digital audio data from the 16-bit audio ADCs is output from this pin. When selected,
DATAAUX is output on SDOUT1.
SDOUT2 - Serial Data Output 2
Digital audio data from the 12-bit audio ADC is output from this pin.
SCLK - DSP Serial Port Clock I/O
SCLK clocks digital audio data into the DACs via SDIN1/2, and clocks data out of the ADCs
on SDOUT1/2. Active clock edge depends on the selected format.
DS86PP8
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