CS2000-OTP Datasheet, PDF (24/30 Pages) Cirrus Logic – Fractional-N Clock Synthesizer & Clock Multiplier

6.1.2
CS2000-OTP
Auxiliary Output Source Selection (AuxOutSrc[1:0])
Selects the source of the AUX_OUT signal.
AuxOutSrc[1:0]
00
01
10
11
Application:
Auxiliary Output Source
RefClk.
CLK_IN.
CLK_OUT.
PLL Lock Status Indicator.
“Auxiliary Output” on page 19
Note: When set to 11, the AuxLockCfg global parameter sets the polarity and driver type (“AUX PLL
Lock Output Configuration (AuxLockCfg)” on page 25).
6.1.3
Auto R-Modifier Enable (AutoRMod)
Controls the automatic ratio modifier function.
AutoRMod
0
1
Application:
Automatic R-Mod State
Disabled.
Enabled.
“Automatic Ratio Modifier (Auto R-Mod) - Hybrid PLL Mode Only” on page 15
6.1.4
Lock Clock Ratio (LockClk[1:0])
Selects one of the four stored User Defined Ratios for use in the dynamic ratio based Hybrid PLL Mode.
LockClk[1:0]
00
01
10
11
Application:
CLK_IN Ratio Selection
Ratio 0.
Ratio 1.
Ratio 2.
Ratio 3.
Section 5.4.2 on page 14
Note: The User Defined Ratio for the static ratio based Frequency Synthesizer mode is the ratio that
corresponds with the currently chosen configuration set as shown in Figure 16 on page 23.
6.1.5
Fractional-N Source for Frequency Synthesizer (FracNSrc)
Selects static or dynamic ratio mode when auto clock switching is disabled.
FracNSrc
0
1
Application:
Fractional-N Source Selection
Static Ratio directly from R_EFF for Frequency Synthesizer Mode
Dynamic Ratio from Digital PLL for Hybrid PLL Mode
“Fractional-N Source Selection” on page 16
6.2 Ratio 0 - 3
The four 32-bit User Defined Ratios are stored in the CS2000’s one time programmable memory. See “Out-
put to Input Frequency Ratio Configuration” on page 14 and “Calculating the User Defined Ratio” on
page 27 for more details.
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