English
Language : 

CS4341 Datasheet, PDF (23/36 Pages) Cirrus Logic – 24-Bit, 96 kHz Stereo DAC with Volume Control 
CS4341
Master Clock - MCLK
Pin 5, Input
Function:
The master clock frequency must be either 256x, 384x, 512x, 768x or 1024x the input sample rate in Base
Rate Mode (BRM) and 128x, 192x, 256x or 384x the input sample rate in High Rate Mode (HRM). Note
that some multiplication factors require setting the MCLKDIV bit in the MCLK Control Register. Table 12
illustrates several standard audio sample rates and the required master clock frequencies.
Sample Rate
(kHz)
32
44.1
48
64
88.2
96
128x
4.0960
5.6448
6.1440
8.1920
11.2896
12.2880
HRM
192x
256x*
6.1440 8.1920
8.4672 11.2896
9.2160 12.2880
12.2880 16.3840
16.9344 22.5792
18.4320 24.5760
MCLK (MHz)
384x*
12.2880
16.9344
18.4320
24.5760
33.8688
36.8640
256x
8.1920
11.2896
12.2880
-
-
-
384x
12.2880
16.9344
18.4320
-
-
-
BRM
512x
16.3840
22.5792
24.5760
-
-
-
* Requires MCLKDIV bit = 1 in MCLK Control Register (address 00h)
Table 12. Common Clock Frequencies
768x*
24.5760
32.7680
36.8640
-
-
-
1024x*
32.7680
45.1584
49.1520
-
-
-
Left/Right Clock - LRCK
Pin 4, Input
Function:
The Left/Right clock determines which channel is currently being input on the serial audio data input, SDA-
TA. The frequency of the Left/Right clock must be at the input sample rate. Audio samples in Left/Right
sample pairs will be simultaneously output from the digital-to-analog converter whereas Right/Left pairs
will exhibit a one sample period difference. The required relationship between the Left/Right clock, serial
clock and serial data is defined by the Mode Control Byte and the options are detailed in Figures 20-26.
Serial Audio Data - SDATA
Pin 2, Input
Function:
Two’s complement MSB-first serial data is input on this pin. The data is clocked into SDATA via the serial
clock and the channel is determined by the Left/Right clock. The required relationship between the
Left/Right clock, serial clock and serial data is defined by the Mode Control Byte and the options are de-
tailed in Figures 20-26.
DS298PP2
23