CS4228 Datasheet, PDF (21/30 Pages) Cirrus Logic – 24-Bit, 96 kHz Surround Sound Codec

CS4228
DAC Mute1 Control
Address 0x04
7
MUT6
1
6
MUT5
1
5
MUT4
1
4
MUT3
1
3
MUT2
1
2
MUT1
1
1
RMP1
0
0
RMP0
0
MUT6 - MUT1
RMP1:0
Mute control for DAC6 - DAC1 respectively. When asserted, the corresponding DAC is digitally
attenuated to its maximum value (90.5 dB). When deasserted, the corresponding DAC attenu-
tation value returns to the value stored in the corresponding Digital Volume Control register. The
attenuation value is ramped up and down at the rate specified by RMP1:0.
0 - Normal output level
*1 - Selected DAC output fully attenuated.
Attenuation ramp rate.
*0 - 0.5dB change per 4 LRCKs
1 - 0.5dB change per 8 LRCKs
2 - 0.5dB change per 16 LRCKs
3 - 0.5dB change per 32 LRCKs
DAC Mute2 Control
Address 0x05
7
MUTEC
0
6
MUTCZ
0
5
4
RESERVED
0
0
3
HMUTE56
0
2
HMUTE34
0
1
HMUTE12
0
0
RESERVED
0
MUTEC
MUTCZ
HMUTE56/34/12
Controls the MUTEC pin
*0 - Normal operation
1 - MUTEC pin asserted low
Automatically asserts the MUTEC pin on consecutive zeros. When enabled, 512 consecutive
zeros on all six DAC inputs will cause the MUTEC pin to be asserted low. A single non-zero
value on any DAC input will cause the MUTEC pin to deassert.
*0 - Disabled
1 - Enabled
Hard mute the corresponding DAC pair. When asserted, zero data is sent to the corresponding
DAC pair causing an instantaneous mute. To prevent high frequency transients on the outputs,
a DAC pair should be fully attenuated by asserting the corresponding MUT6-MUT1 bits in the
DAC Mute Control register or by writing 0xFF to the corresponding Digital Volume Control reg-
isters before asserting HMUTE.
*0 - Normal operation
1 - DAC pair is muted
DS307PP1
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