CS22210 Datasheet, PDF (15/31 Pages) Cirrus Logic – WIRELESS PCI/USB CONTROLLER

PLL and Clock Interface
There are three clock pins and five PLL power pins. Total of 8 signals in this interface.
XTAL_CLKIN
Input
44 MHz reference clock input/crystal clock input for PCI and 48 MHz for
USB.
XTALOUT
Output
Reference crystal clock output.
XTRACLK
Input
Second clock input to clock module. This input allows independent control
for mem_clk and ctl_clk. The usage of this clock input is determined by the
clk module configuration, which is determined by the three strapping input
pin values.
PLLAGND
Input
Analog PLL ground.
PLLAVCC
Input
Analog PLL power. 3.3V input.
PLLDGND
Input
Digital PLL ground.
PLLDVCC
Input
Digital PLL power. 1.8V input.
PLLPLUS
Input
Analog PLL ground.
PCI Interface
The PCI interface is a standard 2.2 compliant interface. There are a total of 51 signals.
AD[31:0]
Bi-directional
PCI address/data. This bus contains a physical address during the first
clock of a PCI transfer and data during subsequent clocks. The signals
are inputs during the address and write data phases of a transaction, or
outputs during the read data phase of a transaction.
CS22210 PCI/USB Wireless Controller
15 of 31
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