CS22210 Datasheet, PDF (10/31 Pages) Cirrus Logic – WIRELESS PCI/USB CONTROLLER

nSMWE
SMDQM[1:0]
SMCKE
SMA0
SMA1
SMA2
SMA3
SMA4
SMA5
Output
Write enable is used in combination with nSMRAS, nSMCAS, and
nSMWE to specify whether the current cycle is a read or a write cycle.
Also used during reset to latch in the strap value for tst_bypass; if set to a
'1' implies PLL bypass. Also shared as the ROMWE to do flash
programming.
Output
Data mask bit 1:0. These signals function as byte enable lines masking
unwanted bytes on memory writes. Also used as testmode(1:0) when
NTEST pin is '0'.
Output
Clock enable. SMCKE is used to enable and disable clocking of internal
RAM logic.
Output
Address bit0. The address bus specifies either the row address or column
address. Also shared as boot-rom address bit0. This pin should be pull-
down.
Output
Address bit1. Also shared as boot-rom address bit1. Also used during
reset to latch in the strap value for pcisel; if set to a '1' implies pci mode.
Output
Address bit2. Also shared as boot-rom address bit2. Also used during
reset to latch in the strap value for usbsel; if set to a '1' implies usb mode.
Output
Address bit3. Also shared as boot-rom address bit3. This pin should be
pull-down.
Output
Address bit4. Also shared as boot-rom address bit4. Also used during
reset to latch in the strap value for romcfg; if set to a '1' implies pci
configuration data should be downloaded from ROM.
Output
Address bit5. Also shared as boot-rom address bit5. Also used during
reset to latch in the strap value for test_rst_enb; if set to a '0' implies
normal operation mode.
CS22210 PCI/USB Wireless Controller
10 of 31
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D556PP2 Rev. 3.0