CS1601 Datasheet, PDF (13/16 Pages) Cirrus Logic – Digital PFC Controller for Electronic Ballasts

CS1601
5.11 Overpower Protection
The CS1601 incorporates an internal Overpower Protection
(OPP) algorithm. This provides protection from overload
conditions. This algorithm uses the condition that output
power is a function of the boost inductor (Section 5.4).
Under moderate overload, V_link may droop up to 10% while
maintaining rated power and PFC. Further increasing the load
current causes V_link to drop below the startup threshold
(~360V). Below this threshold, the circuit changes its
operating mode to startup with more power available to raise
V_link. As V_link reaches its nominal value, startup mode is
canceled and power is now limited to the rated value. If the
overload is still present, this cycle will repeat.
If a sustained overload, or a repeated cycle of overload events
is detected for greater than 112 mS, the CS1601 shuts down
for 2.5 seconds, then attempts to restart.
5.12 Open/Short Loop Protection
If the PFC output sense resistor, R_IFB, fails (open or short to
GND), the measured output voltage decreases at a slew rate of
about 2 V/s, which is determined by the ADC sampling rate.
The IC stops the gate drive when the measured output voltage is
lower than the measured line voltage. The IC resumes gate drive
switching when the current into the IFB pin becomes larger than
or equal to the current into the IAC pin and V_link is greater than
the peak of the line voltage (V_rect(pk)). The maximum response
time of open/short loop protection for R_IFB is about 150s.
If the PFC input sense resistor R_IAC fails (open or short to GND),
the current reference signal supplied to the IC on pin IAC falls to
zero.
5.13 Internal Overtemperature Protection
An internal thermal sensor triggers a shutdown when the
temperature exceeds 135°C (nominal) on the silicon. The
sensor sends a signal to the core that supplies current to all
internal digital logic, cutting off power from them. Once the
temperature of the IC has dropped by 9°C (nominal), the
sensor resets, allowing power to the logic.
5.14 Standby (STBY) Function
The standby (STBY) pin provides a means by which an
external signal can cause the CS1601 to enter a non-
operating, low-power state. The STBY input is intended to be
driven by an open-collector/open-drain device. Internal to the
pin, there is a pull-up resistor connected to the V_DD pin as
shown in Figure 23. Since the pull-up resistor has a high
impedance, the user may need to provide a filter capacitor (up
to 1000pF) on this pin.
VDD
8
STBY
2
600 k
CS1601
<1 nF
See Text
6
GND
Figure 23. STBY Pin Connection
When the STBY pin is not used, it is recommended that the pin
be tied to V_DD (pulled high).
DS931PP6
13