CDB61581 Datasheet, PDF (11/16 Pages) Cirrus Logic – Universal Line Interface Unit

+5V
HDR12
HDR5X2
DB25F_RA
J1
1
L2
14
2 SCLK FERRITE_BEAD
15
L3
3 SDI
16
4 CS
17
FERRITE_BEAD
L4
5
18
FERRITE_BEAD
6
19
7
20
8
21
9
22
10
23
11
FERRITE_BEAD
24
L5
12
INT
25
L6
13
SDO
FERRITE_BEAD
GND
+5V
SW1
6
5
4
3
2
1
SW_DIP_6
TAOS
LLOOP
RLOOP
LBO2
LBO1
JASEL
GND
INT
CS
SDI
SCLK/LLOOP
U2
1
20
19 ^{/G1 VCC}
/G2
2
3 ^A1
4 ^A2
5 ^A3
6 ^A4
7 ^A5
8 ^A6
9 ^A7
A8
18
Y1 ₁₇
Y2 ₁₆
Y3 ₁₅
Y4 ₁₄
Y5 ₁₃
Y6 ₁₂
Y7 ₁₁
Y8
10
GND
SN74HCT541N
GND
C15
.1UF
R9
47
C9
100PF _COG
R10
GND
GND
47
C10
100PF _COG
R8
47
C8
COG 100PF
GND
R7
C7 ⁴⁷
COG ^100PF
GND
R11
47
C11
100PF COG
GND
GND
1N4148
D6
RN1
47K
1N4148
1N4148
D8
HDR1X2
HDR10
12
HWMODE
D7
HW_RST/NLOOP
R12
100
S2
SW_B3W_1100
GND
GND _+5V
U4
11
10
MC74F14N
U4
13
12
MC74F14N
GND
BNC
J2 MCLK
BNC
J5
TCLK
BNC
J6 TPOS
BNC
J7
TNEG
BNC
J8
RNEG
BNC
RPOS
J9
BNC
J12 RCLK
GND
HDR8
12
TNEG_HI
HDR9
RNEG
RPOS
RCLK
R6
4.7K
6.1760MHZ
Y1
GND
+5V
S1 ^+5V
1 SW
2
3 _HW
4
SW_SP3T
HWCDR
GND
HDR7
GND
1
2
3
4
J18
J19
+5V
GND
Z1
P6KE6V8P
L1
C1
FERRITE_BEAD
47UF
+5V
GND
4 3 2 1 28 27 26
5
MODE
6
RNEG/BPV
L802/ 25
SDO
24
L801/SDI
7
RPOS/RDATA
8
RCLK
U1
CS61581
23
NLOOP/INT
22
RGND
9 _{XTALIN SKT_PLCC28_ECM}
21
RV+
10
XTALOUT
20
RRING
11
JASEL
19
RTIP
12 13 14 15 16 17 18
TTIP
GND
LATN
TRING
RRING
RECEIVE
R1
5
TP1
6
J3
49.9
6
HDR6
C3
3
HDR5
HDR1X2
7
8
.47UF
R2
49.9
1
GND
PE_64936
T1
TP2
2
RTIP
9
10
C2
47PF
CON_RTT87
RTIP
C4
.1UF
COG
V+
JP8
HDR3
GND
21
RRING
RRING
RTIP
V+
C5
.1UF
JP9
C6
47UF
C12
R3
12.4
R4
12.4
MATZ
HDR1
1
2
3
4
LOWZ
MATZ
HDR2
2
1
4
3
LOWZ
TRING
T2
TP3
PE_65351
2
1
TTIP
3
TP4
6
5
/T-1054
.47UF
C14
.1UF
HDR4
HDR1X2
GND
U3
TRANSMIT
J3
1
2
3
4
5
CON_RTT87
TTIP
TRING
1
24
RCLK
2
23
LATN
3
22
4
21
5
20
6
19
7
18
GND
8
17
9
16
10
15
11
14
12
13
PALCE20RA10H
U4
5
6
MC74F14N
U4
9
8
MC74F14N
C13
.1UF
VCC 14 U4
1
2
MC74F14N
GND 7
GND ^U4
3
4
MC74F14N
+5V
LED_555_5003
LATN1
5
4
LATN2
6
3
LOS
7
2
NLOOP
8
1
D1
Figure 4. CDB61581 Evaluation Board Schematic