THC63LVD1023B Datasheet, PDF (9/26 Pages) THine Electronics, Inc. – 160MHz 67Bits LVDS Transmitter

Switching Characteristics
Symbol
Parameter
t_TCIP
t_TCH
t_TCL
t_TS
t_TH
t_TCD
CLK IN Period(Fig4,5)
CLK IN High Time(Fig4,5)
CLK IN Low Time(Fig4,5)
TTL Data Setup to CLK IN(Fig4,5)
TTL Data Hold from CKL IN(Fig4,5)
CLK IN to TCLK+/- Delay(Fig4,5)
MODE<1:0>=LL
Dual-in/Dual-out
t_TCOP
t_LVT
t_TOP1
CLK OUT Period(Fig6)
LVDS Transition Time(Fig2)
Output Data
Position0 (Fig6)
t_TOP0
Output Data
Position1 (Fig6)
t_TOP6
t_TOP5
t_TOP4
Output Data
Position2 (Fig6)
Output Data
Position3 (Fig6)
Output Data
Position4 (Fig6)
t_TCOP =
6.25ns~20ns
t_TOP3
Output Data
Position5 (Fig6)
t_TOP2
Output Data
Position6 (Fig6)
t_TPLL
t_DEINT
PLL Lock time(Fig3)
DE input period (Fig3-1)
Single-in / Dual-out, DDR Off mode
only(MODE<2:0>=LHL)
t_DEH
DE High time (Fig3-1)
Single-in / Dual-out, DDR Off mode
only(MODE<2:0>=LHL)
DE Low time(Fig3-1)
t_{DEL Single-in / Dual-out, DDR Off mode}
only(MODE<2:0>=LHL)
a. Refer to Fig3-1 for details.
Min.
6.25
0.35t_TCIP
0.35t_TCIP
2.5
0.0
(4+3/7)t_TCIP
+2.6
6.25
-0.15
t--_{T----C---O----P-- – 0.15}
7
2t--^T----^C---^O----^P-- – 0.15
7
3-t-^T----^C---^O----^P-- – 0.15
7
4-t-^T----^C---^O----^P-- – 0.15
7
5-t-^T----^C---^O----^P-- – 0.15
7
6-t-^T----^C---^O----^P-- – 0.15
7
4t_TCIP
2t_TCIP
2t_TCIP
V_CC = VCC=PVCC=LVCC
Typ.
Max.
Units
100 ns
0.5t_TCIP
0.5t_TCIP
0.65t_TCIP ns
0.65t_TCIP ns
ns
ns
(4+3/7)t_{TCIP ns}
+7.5
50 ns
0.6
1.5 ns
0.0
+0.15 ns
-t-^T----^C---^O----^P--
7
2 ^t--T----^C---^O----^P--
7
3 ^t--T----^C---^O----^P--
7
4 ^t--T----^C---^O----^P--
7
5 ^t--T----^C---^O----^P--
7
6 ^t--T----^C---^O----^P--
7
-t-^T----^C---^O----^P-- + 0.15
ns
7
2t--^T----^C---^O----^P-- + 0.15
ns
7
3t--^T----^C---^O----^P-- + 0.15
ns
7
4t--^T----^C---^O----^P-- + 0.15
ns
7
5t--^T----^C---^O----^P-- + 0.15
ns
7
6t--^T----^C---^O----^P-- + 0.15
ns
7
10.0 ms
tTCIP*(2n) ^a
ns
tTCIP*(2m)^a
ns
ns
THC63LVD1023B_Rev.3.0_E
9/26
Copyright©2011 THine Electronics, Inc.
THine Electronics, Inc.