CAT25010_07 Datasheet, PDF (8/17 Pages) Catalyst Semiconductor – 1-Kb, 2-Kb and 4-Kb SPI Serial CMOS EEPROM

CAT25010, CAT25020, CAT25040
Write Status Register
The Status Register is written by sending a WRSR
instruction according to timing shown in Figure 6. Only
bits 2 and 3 can be written using the WRSR
command.
Write Protection
When ¯W¯P¯ input is low all write operations to the
memory array and Status Register are inhibited. ¯W¯P¯
going low while C¯¯S is still low will interrupt a write to
the status register. If the internal write cycle has
already been initiated, ¯W¯P¯ going low will have no
effect on any write operation to the Status Register.
The ¯W¯P¯ input timing is shown in Figure 7.
Figure 6. WRSR Timing
CS
SCK
0
1
2
3
4
5
6
7
8
9 10 11 12 13 14 15
OPCODE
SI
0
0
0
0
00
0
SO
HIGH IMPEDANCE
Note: Dashed Line = mode (1, 1) - - - - - -
DATA IN
1
7
6
5
4
32
10
MSB
Figure 7. ¯W¯P¯ Timing
t _WPS
t _WPH
CS
SCK
WP
WP
Note: Dashed Line = mode (1, 1) - - - - - -
Doc. No. MD-1006 Rev. T
8
© Catalyst Semiconductor, Inc.
Characteristics subject to change without notice