CAT25010_07 Datasheet, PDF (3/17 Pages) Catalyst Semiconductor – 1-Kb, 2-Kb and 4-Kb SPI Serial CMOS EEPROM

A.C. CHARACTERISTICS
T_A = -40°C to +125°C, unless otherwise specified.⁽¹⁾
Symbol
f_SCK
t_SU
t_H
t_WH
t_WL
t_LZ
t_RI(2)
t_FI(2)
t_HD
t_CD
t_V
t_HO
t_DIS
t_HZ
t_CS
t_CSS
t_CSH
t_WPS
t_WPH
t_WC(4)
Parameter
Clock Frequency
Data Setup Time
Data Hold Time
SCK High Time
SCK Low Time
H¯¯O¯L¯D¯ to Output Low Z
Input Rise Time
Input Fall Time
H¯¯O¯L¯D¯ Setup Time
H¯¯O¯L¯D¯ Hold Time
Output Valid from Clock Low
Output Hold Time
Output Disable Time
H¯¯O¯L¯D¯ to Output High Z
C¯¯S High Time
C¯¯S Setup Time
C¯¯S Hold Time
¯W¯P¯ Setup Time
¯W¯P¯ Hold Time
Write Cycle Time
Power-Up Timing⁽²⁾⁽³⁾
Symbol Parameter
t_PUR Power-up to Read Operation
t_PUW Power-up to Write Operation
CAT25010, CAT25020, CAT25040
V_CC = 1.8V-5.5V
Min.
DC
30
30
75
75
0
10
0
50
50
50
10
10
Max.
5
50
2
2
75
50
100
5
V_CC = 2.5V-5.5V
T_A= -40°C to +85°C
Min.
Max.
DC
10
20
20
40
40
25
2
2
0
10
40
0
20
25
15
15
15
10
10
5
Units
MHz
ns
ns
ns
ns
ns
µs
µs
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ms
Max.
1
1
Units
ms
ms
Notes:
(1) AC Test Conditions:
Input Pulse Voltages: 0.3V_CC to 0.7V_CC
Input rise and fall times: ≤ 10ns
Input and output reference voltages: 0.5V_CC
Output load: current source I_{OL max}/I_{OH max}; C_L = 50pF
(2) This parameter is tested initially and after a design or process change that affects the parameter.
(3) t_PUR and t_PUW are the delays required from the time V_CC is stable until the specified operation can be initiated.
(4) t_WC is the time from the rising edge of C¯¯S after a valid write sequence to the end of the internal write cycle.
© Catalyst Semiconductor, Inc.
3
Characteristics subject to change without notice
Doc. No. MD-1006 Rev. T