CAT24FC64_05 Datasheet, PDF (8/10 Pages) Catalyst Semiconductor – 64K-Bit I2C Serial CMOS EEPROM

CAT24FC64
Figure 9. Selective Read Timing
S
T
BUS ACTIVITY: ^A SLAVE
MASTER ^R ADDRESS
T
BYTE ADDRESS
A15–A8
A7–A0
S
T
A _SLAVE
R _ADDRESS
T
S
T
DATA
O
P
SDA LINE S
***
S
P
A
A
A
A
N
C
C
C
C
O
*^{=Don't Care Bit}
K
K
K
K
A
C
K
rt _{Figure 10. Sequential Read Timing}
a _{BUS ACTIVITY: SLAVE}
P _{MASTER ADDRESS}
SDA LINE
d A
C
Discontinue ^K
DATA n
DATA n+1
DATA n+2
A
A
A
C
C
C
K
K
K
S
T
DATA n+x
O
P
P
N
O
A
C
K
Doc. No. 1046, Rev. K
8
© 2005 by Catalyst Semiconductor, Inc.
Characteristics subject to change without notice