CAT5259 Datasheet, PDF(5/16 Page) Catalyst Semiconductor – Quad Digitally Programmable Potentiometers (DPP) with 256 Taps and 2-wire Interface

English

English German Russian Spanish Italian Polish Chinese Japanese Korean French Portuguese	Language :

CAT5259 Datasheet, PDF (5/16 Pages) Catalyst Semiconductor – Quad Digitally Programmable Potentiometers (DPP) with 256 Taps and 2-wire Interface

◁

CAT5259

POWER UP TIMING (1)(2)

Symbol

Parameter

Max Units

tPUR

Power-up to Read Operation

tPUW

Power-up to Write Operation

Note:

(1) This parameter is tested initially and after a design or process change that affects the parameter.

(2) tPUR and tPUW are delays required from the time VCC is stable until the specified operation can be initiated.

XDCP TIMING

Symbol Parameter

tWRPO Wiper Response Time After Power Supply Stable

tWRL Wiper Response Time After Instruction Issued

Min Max Units

10 Âµs

WRITE CYCLE LIMITS

Symbol

Parameter

tWR

Write Cycle Time

Max Units

The write cycle is the time from a valid stop condition of a write sequence to the end of the internal program/erase

cycle. During the write cycle, the bus interface circuits are disabled, SDA is allowed to remain high, and the device

does not respond to its slave address.

RELIABILITY CHARACTERISTICS

Symbol

NEND(1)

TDR(1)

VZAP(1)

ILTH(1)

Parameter

Endurance

Data Retention

ESD Susceptibility

Latch-Up

Min

1,000,000

100

2000

100

Max

Units

Cycles/Byte

Years

Volts

Reference Test Method

MIL-STD-883, Test Method 1033

MIL-STD-883, Test Method 1008

MIL-STD-883, Test Method 3015

JEDEC Standard 17

Note:

(1) This parameter is tested initially and after a design or process change that affects the parameter.

Figure 1. Bus Timing

SCL

tSU:STA

SDA IN

SDA OUT

tHIGH

tLOW

tHD:DAT

tHD:STA

tSU:DAT

tAA

tDH

tSU:STO

tBUF

Document No. 2000, Rev. F

▷