CAT5259 Datasheet, PDF (4/16 Pages) Catalyst Semiconductor – Quad Digitally Programmable Potentiometers (DPP) with 256 Taps and 2-wire Interface

CAT5259
D.C. OPERATING CHARACTERISTICS
V_CC = +2.5V to +6.0V, unless otherwise specified.
Symbol
Parameter
Min
ICC1
Power Supply Current
Max
Units
1
mA
ICC2
Power Supply Current
Non-volatile WRITE
5
mA
I_SB
Standby Current (V_CC = 5.0V)
5
µA
I_LI
Input Leakage Current
10
µA
I_LO
Output Leakage Current
10
µA
VIL
Input Low Voltage
-1
VCC x 0.3 V
V_IH
Input High Voltage
V_CC x 0.7 V_CC + 1.0
V
V_OL1 Output Low Voltage (V_CC = 3.0V)
0.4
V
Test Conditions
fSCL = 400 KHz, SDA = Open
VCC = 6 V, Inputs = GND
fSCK = 400 KHz, SDA Open
VCC = 6 V, Input = GND
V_IN = GND or V_CC, SDA = Open
V_IN = GND to V_CC
V_OUT = GND to V_CC
I_OL = 3 mA
CAPACITANCE
T_A = 25˚C, f = 1.0 MHz, V_CC = 5V
Symbol
Test
Max.
C_I/O(1) Input/Output Capacitance (SDA)
8
CIN(1) Input Capacitance (A0, A1, A2, A3, SCL, WP) 6
Units
pF
pF
Conditions
V_I/O = 0V
VIN = 0V
A.C. CHARACTERISTICS
2.5V-6.0V
Symbol Parameter
Min. Max.
fSCL
Clock Frequency
400
TI(1)
Noise Suppression Time Constant at SCL, SDA Inputs
200
tAA
SLC Low to SDA Data Out and ACK Out
1
tBUF(1)
Time the bus must be free before a new transmission can start
1.2
tHD:STA Start Condition Hold Time
0.6
tLOW
Clock Low Period
1.2
tHIGH
Clock High Period
0.6
tSU:STA Start Condition SetupTime (for a Repeated Start Condition)
0.6
tHD:DAT Data in Hold Time
0
tSU:DAT Data in Setup Time
50
tR(1)
SDA and SCL Rise Time
0.3
tF(1)
SDA and SCL Fall Time
300
tSU:STO Stop Condition Setup Time
0.6
tDH
Data Out Hold Time
100
Note:
(1) This parameter is tested initially and after a design or process change that affects the parameter.
Units
kHz
ns
µs
µs
µs
µs
µs
µs
ns
ns
µs
ns
µs
ns
Document No. 2000, Rev. F
4