CAT5259 Datasheet, PDF (2/16 Pages) Catalyst Semiconductor – Quad Digitally Programmable Potentiometers (DPP) with 256 Taps and 2-wire Interface

CAT5259
PIN DESCRIPTION
Pin
(SOIC/
TSSOP)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
Name
NC
A0
RW3
RH3
RL3
NC
VCC
RL0
RH0
RW0
A2
WP
SDA
A1
RL1
RH1
RW1
GND
NC
RW2
RH2
RL2
SCL
A3
Function
No Connect
Device Address, LSB
Wiper Terminal for Potentiometer 3
High Reference Terminal for Potentiometer 3
Low Reference Terminal for Potentiometer 3
No Connect
Supply Voltage
Low Reference Terminal for Potentiometer 0
High Reference Terminal for Potentiometer 0
Wiper Terminal for Potentiometer 0
Device Address
Write Protection
Serial Data Input/Output
Device Address
Low Reference Terminal for Potentiometer 1
High Reference Terminal for Potentiometer 1
Wiper Terminal for Potentiometer 1
Ground
No Connect
Wiper Terminal for Potentiometer 2
High Reference Terminal for Potentiometer 2
Low Reference Terminal for Potentiometer 2
Bus Serial Clock
Device Address
PIN DESCRIPTIONS
SCL: Serial Clock
The CAT5259 serial clock input pin is used to
clock all data transfers into or out of the device.
SDA: Serial Data
The CAT5259 bidirectional serial data pin is
used to transfer data into and out of the device.
The SDA pin is an open drain output and can be
wire-Ored with the other open drain or open
collector I/Os.
A0, A1, A2, A3:Device Address Inputs
These inputs set the device address when
addressing multiple devices. A total of sixteen
devices can be addressed on a single bus. A
match in the slave address must be made with
the address input in order to initiate communica-
tion with the CAT5259.
R_H, R_L: Resistor End Points
The four sets of R_H and R_L pins are equivalent
to the terminal connections on a mechanical
potentiometer.
RW: Wiper
The four RW pins are equivalent to the wiper
terminal of a mechanical potentiometer.
WP: Write Protect Input
The WP pin when tied low prevents non-volatile
writes to the device (change of wiper control
register is allowed) and when tied high or left
floating normal read/write operations are
allowed. See Write Protection on page 6 for
more details.
DEVICE OPERATION
The CAT5259 is four resistor arrays integrated with a 2-wire serial interface logic, four 8-bit wiper control registers and
sixteen 8-bit, non-volatile memory data registers. Each resistor array contains 255 separate resistive elements
connected in series. The physical ends of each array are equivalent to the fixed terminals of a mechanical
potentiometer (RH and RL). The tap positions between and at the ends of the series resistors are connected to the
output wiper terminals (RW) by a CMOS transistor switch. Only one tap point for each potentiometer is connected to
its wiper terminal at a time and is determined by the value of the wiper control register. Data can be read or written
to the wiper control registers or the non-volatile memory data registers via the 2-wire bus. Additional instructions allow
data to be transferred between the wiper control registers and each respective potentiometer's non-volatile data
registers. Also, the device can be instructed to operate in an "increment/decrement" mode.
Document No. 2000, Rev. F
2