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CAT25C65 Datasheet, PDF (4/11 Pages) Catalyst Semiconductor – 32K/64K-Bit SPI Serial CMOS EEPROM
CAT25C33/65
FUNCTIONAL DESCRIPTION
PIN DESCRIPTION
The CAT25C33/65 supports the SPI bus data
transmission protocol. The synchronous Serial Peripheral
Interface (SPI) helps the CAT25C33/65 to interface
directly with many of today’s popular microcontrollers.
The CAT25C33/65 contains an 8-bit instruction register.
(The instruction set and the operation codes are detailed
in the instruction set table)
After the device is selected with CS going low, the first
byte will be received. The part is accessed via the SI pin,
with data being clocked in on the rising edge of SCK.
The first byte contains one of the six op-codes that define
the operation to be performed.
SI: Serial Input
SI is the serial data input pin. This pin is used to input all
opcodes, byte addresses, and data to be written to the
25C33/65. Input data is latched on the rising edge of the
serial clock.
SO: Serial Output
SO is the serial data output pin. This pin is used to
transfer data out of the 25C33/65. During a read cycle,
data is shifted out on the falling edge of the serial clock.
Figure 1. Sychronous Data Timing
VIH
tCS
CS
SCK
SI
VIL
tCSS
VIH
VIL
VIH
VIL
tWH
tSU
tH
VALID IN
VOH
SO
VOL
HI-Z
Note: Dashed Line= mode (1, 1) — — — —
tCSH
tWL
tRI
tFI
tV
tHO
tDIS
HI-Z
INSTRUCTION SET
Instruction
WREN
WRDI
RDSR
WRSR
READ
WRITE
Opcode
0000 0110
0000 0100
0000 0101
0000 0001
0000 0011
0000 0010
Operation
Enable Write Operations
Disable Write Operations
Read Status Register
Write Status Register
Read Data from Memory
Write Data to Memory
Power-Up Timing(2)(3)
Symbol
Parameter
Max.
tPUR
Power-up to Read Operation
1
tPUW
Power-up to Write Operation
1
Note:
(1) X=0 for 25010, 25020. X=A8 for 25040
(2) This parameter is tested initially and after a design or process change that affects the parameter.
(3) tPUR and tPUW are the delays required from the time VCC is stable until the specified operation can be initiated.
Units
ms
ms
Doc. No. 1000, Rev. F
4