CAT25C65 Datasheet, PDF (3/11 Pages) Catalyst Semiconductor – 32K/64K-Bit SPI Serial CMOS EEPROM

CAT25C33/65
PIN CAPACITANCE ⁽¹⁾
Applicable over recommended operating range from TA=25˚C, f=1.0 MHz, VCC=+5.0V (unless otherwise noted).
Symbol
Test Conditions
Max.
Units Conditions
C_OUT Output Capacitance (SO)
8
C_IN
Input Capacitance (CS, SCK, SI, WP, HOLD)
6
pF
V_OUT=0V
pF
V_IN=0V
A.C. CHARACTERISTICS
SYMBOL PARAMETER
Vcc=
1.8V-6.0V
Min. Max.
Limits
V_CC =
2.5V-6.0V
Min. Max.
V_CC =
4.5V-5.5V
Min. Max.
Test
UNITS Conditions
tSU
Data Setup Time
50
50
20
ns
tH
Data Hold Time
50
50
20
ns
tWH
SCK High Time
250
125
40
ns
tWL
SCK Low Time
250
125
40
ns
fSCK
tLZ
tRI(1)
tFI(1)
tHD
tCD
Clock Frequency
HOLD to Output Low Z
Input Rise Time
Input Fall Time
HOLD Setup Time
HOLD Hold Time
DC
1 DC
50
2
2
100
100
100
100
3
DC 10
50
50
2
2
2
2
40
40
MHz
ns
µs
µs
ns
ns
C_L = 50pF
tWC
Write Cycle Time
10
10
5
ms
tV
Output Valid from Clock Low
250
250
80
ns
tHO
Output Hold Time
0
0
0
ns
tDIS
Output Disable Time
250
250
75
ns
tHZ
HOLD to Output High Z
150
100
50
ns
tCS
CS High Time
500
250
200
ns
tCSS
CS Setup Time
500
250
100
ns
tCSH
CS Hold Time
500
250
100
ns
NOTE:
(1) This parameter is tested initially and after a design or process change that affects the parameter.
3
Doc No. 1000, Rev. F