CAT34RC02 Datasheet, PDF (3/16 Pages) Catalyst Semiconductor – 2-kb I2C Serial EEPROM, Serial Presence Detect

CAT34RC02
A.C. CHARACTERISTICS
V_CC = 1.7 V to 5.5 V, unless otherwise specified.
Read & Write Cycle Limits
Symbol
Parameter
F_SCL
T_I(1)
t_AA
t_BUF(1)
t_HD:STA
t_LOW
t_HIGH
t_SU:STA
t_HD:DAT
t_SU:DAT
t_R(1)
t_F(1)
t_SU:STO
t_DH
Clock Frequency
Noise Suppression Time
Constant at SCL, SDA Inputs
SCL Low to SDA Data Out
and ACK Out
Time the Bus Must be Free Before
a New Transmission Can Start
Start Condition Hold Time
Clock Low Period
Clock High Period
Start Condition Setup Time
(for a Repeated Start Condition)
Data In Hold Time
Data In Setup Time
SDA and SCL Rise Time
SDA and SCL Fall Time
Stop Condition Setup Time
Data Out Hold Time
1.7 V - 5.5 V
Min Max
100
100
3.5
4.7
4
4.7
4
4.7
0
250
1
300
4
100
2.5 V - 5.5 V
Min
Max
400
100
0.9
1.3
0.6
1.3
0.6
0.6
0
100
0.3
300
0.6
100
Units
kHz
ns
µs
µs
µs
µs
µs
µs
ns
ns
µs
ns
µs
ns
Power-Up Timing⁽¹⁾⁽²⁾
Symbol
Parameter
t_PUR
tPUW
Power-up to Read Operation
Power-up to Write Operation
Min
Typ
Max
1
1
Units
ms
ms
Write Cycle Limits
Symbol
Parameter
t_WR
Write Cycle Time
Min
Typ
Max
5
Units
ms
The write cycle time is the time elapsed between the
STOP command (following the write instruction) and the
completion of the internal write cycle. During the internal
write cycle, SDA is released by the Slave and the device
does not acknowledge external commands.
Note:
(1) This parameter is tested initially and after a design or process change that affects the parameter.
(2) t_PUR and t_PUW are the delays required from the time V_CC is stable until the specified operation can be initiated.
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Doc No. 1052, Rev. I